diff --git a/install_config/group_vars/all.yml b/install_config/group_vars/all.yml index dcc6633..35399e0 100644 --- a/install_config/group_vars/all.yml +++ b/install_config/group_vars/all.yml @@ -40,9 +40,19 @@ oam: snmptrapd_ip: "127.0.0.1" snmptrapd_port: 164 mcn0_ip: "192.168.100.1" - + alarm_cpu_critical_high: 90 + alarm_cpu_major_high: 80 + alarm_mem_critical_high: 90 + alarm_mem_major_high: 80 + alarm_disk_critical_high: 90 + alarm_disk_major_high: 80 + alarm_interface_critical_high: "0.0001" + alarm_interface_major_high: "0.00005" + alarm_app_network_critical_high: "0.0001" + alarm_app_network_major_high: "0.0001" + tsg_cli: - rpm_file_name: "tsg-cli-1.1.1.ea016fc-1.el7.x86_64.rpm" + rpm_file_name: "tsg-cli-1.1.2.93221a7-1.el7.x86_64.rpm" ha_master: instance_state: MASTER diff --git a/roles/setup_mariadb/templates/tsg_threshold.sql.j2 b/roles/setup_mariadb/templates/tsg_threshold.sql.j2 index 3325e20..67de102 100644 --- a/roles/setup_mariadb/templates/tsg_threshold.sql.j2 +++ b/roles/setup_mariadb/templates/tsg_threshold.sql.j2 @@ -37,115 +37,115 @@ CREATE TABLE `tsg_threshold` ( -- ---------------------------- -- Records of tsg_threshold -- ---------------------------- -INSERT INTO `tsg_threshold` VALUES ('1', '{{ SN }}_mxn_hardware', 'CMM_TEMP', '55', '-10', '46', '-5', '39', '0'); +INSERT INTO `tsg_threshold` VALUES ('1', '{{ SN }}_mxn_hardware', 'CMM_TEMP', '55', '-10', '46', '-5', null, null); INSERT INTO `tsg_threshold` VALUES ('2', '{{ SN }}_mxn_network_port_1', 'ifInUcastPkts', null, null, null, null, null, null); -INSERT INTO `tsg_threshold` VALUES ('3', '{{ SN }}_mxn_hardware', 'COME_TEMP', '90', '-10', '76', '-5', '63', '0'); -INSERT INTO `tsg_threshold` VALUES ('4', '{{ SN }}_mxn_hardware', 'RRC_TEMP', '90', '-10', '76', '-5', '63', '0'); -INSERT INTO `tsg_threshold` VALUES ('5', '{{ SN }}_mxn_hardware', 'P1V', '1.15', '0.85', '1.1', '0.9', '1.05', '0.95'); -INSERT INTO `tsg_threshold` VALUES ('6', '{{ SN }}_mxn_hardware', 'PVDDS', '1.07', '0.71', '1.04', '0.73', '1', '0.76'); -INSERT INTO `tsg_threshold` VALUES ('7', '{{ SN }}_mxn_hardware', 'PVDDF', '1.12', '0.71', '1.1', '0.73', '1.05', '0.76'); -INSERT INTO `tsg_threshold` VALUES ('8', '{{ SN }}_mxn_hardware', 'P3V3', '3.636', '2.964', '3.535', '3.066', '3.475', '3.139'); -INSERT INTO `tsg_threshold` VALUES ('9', '{{ SN }}_mxn_hardware', 'P5V', '5.745', '4.234', '5.494', '4.486', '5.242', '4.738'); -INSERT INTO `tsg_threshold` VALUES ('10', '{{ SN }}_mxn_hardware', 'P12V', '13.583', '10.415', '13.072', '10.926', '12.51', '11.488'); -INSERT INTO `tsg_threshold` VALUES ('11', '{{ SN }}_mxn_hardware', 'P1V_RT', '1.15', '0.85', '1.1', '0.9', '1.05', '0.95'); -INSERT INTO `tsg_threshold` VALUES ('12', '{{ SN }}_mxn_hardware', 'Fan_1', '9472', '512', '8672', '672', '7872', '832'); -INSERT INTO `tsg_threshold` VALUES ('13', '{{ SN }}_mxn_hardware', 'Fan_2', '9472', '512', '8672', '672', '7872', '832'); -INSERT INTO `tsg_threshold` VALUES ('14', '{{ SN }}_mxn_hardware', 'Fan_3', '9472', '512', '8672', '672', '7872', '832'); -INSERT INTO `tsg_threshold` VALUES ('15', '{{ SN }}_mcn0_hardware', 'HS_Current0', '40.25', '0', '37.25', '0', '36.75', '0'); -INSERT INTO `tsg_threshold` VALUES ('16', '{{ SN }}_mcn1_hardware', 'HS_Current0', '40.25', '0', '37.25', '0', '36.75', '0'); -INSERT INTO `tsg_threshold` VALUES ('17', '{{ SN }}_mcn2_hardware', 'HS_Current0', '40.25', '0', '37.25', '0', '36.75', '0'); -INSERT INTO `tsg_threshold` VALUES ('18', '{{ SN }}_mcn3_hardware', 'HS_Current0', '40.25', '0', '37.25', '0', '36.75', '0'); -INSERT INTO `tsg_threshold` VALUES ('19', '{{ SN }}_mcn0_hardware', 'HS_Volt0', '12.75', '10.5', '12.5', '10.875', '12.25', '11.125'); -INSERT INTO `tsg_threshold` VALUES ('20', '{{ SN }}_mcn1_hardware', 'HS_Volt0', '12.75', '10.5', '12.5', '10.875', '12.25', '11.125'); -INSERT INTO `tsg_threshold` VALUES ('21', '{{ SN }}_mcn2_hardware', 'HS_Volt0', '12.75', '10.5', '12.5', '10.875', '12.25', '11.125'); -INSERT INTO `tsg_threshold` VALUES ('22', '{{ SN }}_mcn3_hardware', 'HS_Volt0', '12.75', '10.5', '12.5', '10.875', '12.25', '11.125'); -INSERT INTO `tsg_threshold` VALUES ('23', '{{ SN }}_mcn0_hardware', 'P1V05_PCH', '1.147', '0.941', '1.117', '0.97', '1.098', '1'); -INSERT INTO `tsg_threshold` VALUES ('24', '{{ SN }}_mcn1_hardware', 'P1V05_PCH', '1.147', '0.941', '1.117', '0.97', '1.098', '1'); -INSERT INTO `tsg_threshold` VALUES ('25', '{{ SN }}_mcn2_hardware', 'P1V05_PCH', '1.147', '0.941', '1.117', '0.97', '1.098', '1'); -INSERT INTO `tsg_threshold` VALUES ('26', '{{ SN }}_mcn3_hardware', 'P1V05_PCH', '1.147', '0.941', '1.117', '0.97', '1.098', '1'); -INSERT INTO `tsg_threshold` VALUES ('27', '{{ SN }}_mcn0_hardware', 'P1V2_DDR0', '1.303', '1.078', '1.284', '1.117', '1.254', '1.137'); -INSERT INTO `tsg_threshold` VALUES ('28', '{{ SN }}_mcn1_hardware', 'P1V2_DDR0', '1.303', '1.078', '1.284', '1.117', '1.254', '1.137'); -INSERT INTO `tsg_threshold` VALUES ('29', '{{ SN }}_mcn2_hardware', 'P1V2_DDR0', '1.303', '1.078', '1.284', '1.117', '1.254', '1.137'); -INSERT INTO `tsg_threshold` VALUES ('30', '{{ SN }}_mcn3_hardware', 'P1V2_DDR0', '1.303', '1.078', '1.284', '1.117', '1.254', '1.137'); -INSERT INTO `tsg_threshold` VALUES ('31', '{{ SN }}_mcn0_hardware', 'P1V2_DDR1', '1.303', '1.078', '1.284', '1.117', '1.254', '1.137'); -INSERT INTO `tsg_threshold` VALUES ('32', '{{ SN }}_mcn1_hardware', 'P1V2_DDR1', '1.303', '1.078', '1.284', '1.117', '1.254', '1.137'); -INSERT INTO `tsg_threshold` VALUES ('33', '{{ SN }}_mcn2_hardware', 'P1V2_DDR1', '1.303', '1.078', '1.284', '1.117', '1.254', '1.137'); -INSERT INTO `tsg_threshold` VALUES ('34', '{{ SN }}_mcn3_hardware', 'P1V2_DDR1', '1.303', '1.078', '1.284', '1.117', '1.254', '1.137'); -INSERT INTO `tsg_threshold` VALUES ('35', '{{ SN }}_mcn0_hardware', 'P3V3', '3.569', '2.945', '3.51', '3.042', '3.452', '3.12'); -INSERT INTO `tsg_threshold` VALUES ('36', '{{ SN }}_mcn1_hardware', 'P3V3', '3.569', '2.945', '3.51', '3.042', '3.452', '3.12'); -INSERT INTO `tsg_threshold` VALUES ('37', '{{ SN }}_mcn2_hardware', 'P3V3', '3.569', '2.945', '3.51', '3.042', '3.452', '3.12'); -INSERT INTO `tsg_threshold` VALUES ('38', '{{ SN }}_mcn3_hardware', 'P3V3', '3.569', '2.945', '3.51', '3.042', '3.452', '3.12'); -INSERT INTO `tsg_threshold` VALUES ('39', '{{ SN }}_mcn0_hardware', 'P5V', '5.453', '4.494', '5.343', '4.631', '5.233', '4.74'); -INSERT INTO `tsg_threshold` VALUES ('40', '{{ SN }}_mcn1_hardware', 'P5V', '5.453', '4.494', '5.343', '4.631', '5.233', '4.74'); -INSERT INTO `tsg_threshold` VALUES ('41', '{{ SN }}_mcn2_hardware', 'P5V', '5.453', '4.494', '5.343', '4.631', '5.233', '4.74'); -INSERT INTO `tsg_threshold` VALUES ('42', '{{ SN }}_mcn3_hardware', 'P5V', '5.453', '4.494', '5.343', '4.631', '5.233', '4.74'); -INSERT INTO `tsg_threshold` VALUES ('43', '{{ SN }}_mcn0_hardware', 'PVCCIN_CPU0', '2.019', '1.323', '1.98', '1.343', '1.94', '1.352'); -INSERT INTO `tsg_threshold` VALUES ('44', '{{ SN }}_mcn1_hardware', 'PVCCIN_CPU0', '2.019', '1.323', '1.98', '1.343', '1.94', '1.352'); -INSERT INTO `tsg_threshold` VALUES ('45', '{{ SN }}_mcn2_hardware', 'PVCCIN_CPU0', '2.019', '1.323', '1.98', '1.343', '1.94', '1.352'); -INSERT INTO `tsg_threshold` VALUES ('46', '{{ SN }}_mcn3_hardware', 'PVCCIN_CPU0', '2.019', '1.323', '1.98', '1.343', '1.94', '1.352'); -INSERT INTO `tsg_threshold` VALUES ('47', '{{ SN }}_mcn0_hardware', 'PVCCIN_CPU1', '2.019', '1.323', '1.98', '1.343', '1.94', '1.352'); -INSERT INTO `tsg_threshold` VALUES ('48', '{{ SN }}_mcn1_hardware', 'PVCCIN_CPU1', '2.019', '1.323', '1.98', '1.343', '1.94', '1.352'); -INSERT INTO `tsg_threshold` VALUES ('49', '{{ SN }}_mcn2_hardware', 'PVCCIN_CPU1', '2.019', '1.323', '1.98', '1.343', '1.94', '1.352'); -INSERT INTO `tsg_threshold` VALUES ('50', '{{ SN }}_mcn3_hardware', 'PVCCIN_CPU1', '2.019', '1.323', '1.98', '1.343', '1.94', '1.352'); -INSERT INTO `tsg_threshold` VALUES ('51', '{{ SN }}_mcn0_hardware', 'PVCCIO', '1.029', '0.853', '1.009', '0.882', '1', '0.902'); -INSERT INTO `tsg_threshold` VALUES ('52', '{{ SN }}_mcn1_hardware', 'PVCCIO', '1.029', '0.853', '1.009', '0.882', '1', '0.902'); -INSERT INTO `tsg_threshold` VALUES ('53', '{{ SN }}_mcn2_hardware', 'PVCCIO', '1.029', '0.853', '1.009', '0.882', '1', '0.902'); -INSERT INTO `tsg_threshold` VALUES ('54', '{{ SN }}_mcn3_hardware', 'PVCCIO', '1.029', '0.853', '1.009', '0.882', '1', '0.902'); -INSERT INTO `tsg_threshold` VALUES ('55', '{{ SN }}_mcn0_hardware', 'Temp_LL', '60', '-10', '50', '-5', '40', '0'); -INSERT INTO `tsg_threshold` VALUES ('56', '{{ SN }}_mcn1_hardware', 'Temp_LL', '60', '-10', '50', '-5', '40', '0'); -INSERT INTO `tsg_threshold` VALUES ('57', '{{ SN }}_mcn2_hardware', 'Temp_LL', '60', '-10', '50', '-5', '40', '0'); -INSERT INTO `tsg_threshold` VALUES ('58', '{{ SN }}_mcn3_hardware', 'Temp_LL', '60', '-10', '50', '-5', '40', '0'); -INSERT INTO `tsg_threshold` VALUES ('59', '{{ SN }}_mcn0_hardware', 'Temp_LR', '45', '-10', '42', '-5', '40', '0'); -INSERT INTO `tsg_threshold` VALUES ('60', '{{ SN }}_mcn1_hardware', 'Temp_LR', '45', '-10', '42', '-5', '40', '0'); -INSERT INTO `tsg_threshold` VALUES ('61', '{{ SN }}_mcn2_hardware', 'Temp_LR', '45', '-10', '42', '-5', '40', '0'); -INSERT INTO `tsg_threshold` VALUES ('62', '{{ SN }}_mcn3_hardware', 'Temp_LR', '45', '-10', '42', '-5', '40', '0'); -INSERT INTO `tsg_threshold` VALUES ('63', '{{ SN }}_mcn0_hardware', 'Temp_PCH', '82', '-10', '74', '-5', '66', '0'); -INSERT INTO `tsg_threshold` VALUES ('64', '{{ SN }}_mcn1_hardware', 'Temp_PCH', '82', '-10', '74', '-5', '66', '0'); -INSERT INTO `tsg_threshold` VALUES ('65', '{{ SN }}_mcn2_hardware', 'Temp_PCH', '82', '-10', '74', '-5', '66', '0'); -INSERT INTO `tsg_threshold` VALUES ('66', '{{ SN }}_mcn3_hardware', 'Temp_PCH', '82', '-10', '74', '-5', '66', '0'); -INSERT INTO `tsg_threshold` VALUES ('67', '{{ SN }}_mcn0_hardware', 'Temp_UL', '85', '-10', '75', '-5', '66', '0'); -INSERT INTO `tsg_threshold` VALUES ('68', '{{ SN }}_mcn1_hardware', 'Temp_UL', '85', '-10', '75', '-5', '66', '0'); -INSERT INTO `tsg_threshold` VALUES ('69', '{{ SN }}_mcn2_hardware', 'Temp_UL', '85', '-10', '75', '-5', '66', '0'); -INSERT INTO `tsg_threshold` VALUES ('70', '{{ SN }}_mcn3_hardware', 'Temp_UL', '85', '-10', '75', '-5', '66', '0'); -INSERT INTO `tsg_threshold` VALUES ('71', '{{ SN }}_mcn0_hardware', 'Temp_UR', '90', '-10', '80', '-5', '70', '0'); -INSERT INTO `tsg_threshold` VALUES ('72', '{{ SN }}_mcn1_hardware', 'Temp_UR', '90', '-10', '80', '-5', '70', '0'); -INSERT INTO `tsg_threshold` VALUES ('73', '{{ SN }}_mcn2_hardware', 'Temp_UR', '90', '-10', '80', '-5', '70', '0'); -INSERT INTO `tsg_threshold` VALUES ('74', '{{ SN }}_mcn3_hardware', 'Temp_UR', '90', '-10', '80', '-5', '70', '0'); -INSERT INTO `tsg_threshold` VALUES ('75', '{{ SN }}_mcn0_hardware', 'Temp_XL710_82599', '90', '-10', '80', '-5', '70', '0'); -INSERT INTO `tsg_threshold` VALUES ('76', '{{ SN }}_mcn1_hardware', 'Temp_XL710_82599', '90', '-10', '80', '-5', '70', '0'); -INSERT INTO `tsg_threshold` VALUES ('77', '{{ SN }}_mcn2_hardware', 'Temp_XL710_82599', '90', '-10', '80', '-5', '70', '0'); -INSERT INTO `tsg_threshold` VALUES ('78', '{{ SN }}_mcn3_hardware', 'Temp_XL710_82599', '90', '-10', '80', '-5', '70', '0'); -INSERT INTO `tsg_threshold` VALUES ('79', '{{ SN }}_mcn0_hardware', 'Temp_mIO0', '60', '-10', '50', '-5', '40', '0'); -INSERT INTO `tsg_threshold` VALUES ('80', '{{ SN }}_mcn1_hardware', 'Temp_mIO0', '60', '-10', '50', '-5', '40', '0'); -INSERT INTO `tsg_threshold` VALUES ('81', '{{ SN }}_mcn2_hardware', 'Temp_mIO0', '60', '-10', '50', '-5', '40', '0'); -INSERT INTO `tsg_threshold` VALUES ('82', '{{ SN }}_mcn3_hardware', 'Temp_mIO0', '60', '-10', '50', '-5', '40', '0'); -INSERT INTO `tsg_threshold` VALUES ('83', '{{ SN }}_mcn0_hardware', 'Temp_mIO1', '60', '-10', '50', '-5', '40', '0'); -INSERT INTO `tsg_threshold` VALUES ('84', '{{ SN }}_mcn1_hardware', 'Temp_mIO1', '60', '-10', '50', '-5', '40', '0'); -INSERT INTO `tsg_threshold` VALUES ('85', '{{ SN }}_mcn2_hardware', 'Temp_mIO1', '60', '-10', '50', '-5', '40', '0'); -INSERT INTO `tsg_threshold` VALUES ('86', '{{ SN }}_mcn3_hardware', 'Temp_mIO1', '60', '-10', '50', '-5', '40', '0'); -INSERT INTO `tsg_threshold` VALUES ('87', '{{ SN }}_mcn0_hardware', 'PECI_CPU0', '90', '-10', '80', '-5', '70', '0'); -INSERT INTO `tsg_threshold` VALUES ('88', '{{ SN }}_mcn1_hardware', 'PECI_CPU0', '90', '-10', '80', '-5', '70', '0'); -INSERT INTO `tsg_threshold` VALUES ('89', '{{ SN }}_mcn2_hardware', 'PECI_CPU0', '90', '-10', '80', '-5', '70', '0'); -INSERT INTO `tsg_threshold` VALUES ('90', '{{ SN }}_mcn3_hardware', 'PECI_CPU0', '90', '-10', '80', '-5', '70', '0'); -INSERT INTO `tsg_threshold` VALUES ('91', '{{ SN }}_mcn0_hardware', 'PECI_CPU1', '90', '-10', '80', '-5', '70', '0'); -INSERT INTO `tsg_threshold` VALUES ('92', '{{ SN }}_mcn1_hardware', 'PECI_CPU1', '90', '-10', '80', '-5', '70', '0'); -INSERT INTO `tsg_threshold` VALUES ('93', '{{ SN }}_mcn2_hardware', 'PECI_CPU1', '90', '-10', '80', '-5', '70', '0'); -INSERT INTO `tsg_threshold` VALUES ('94', '{{ SN }}_mcn3_hardware', 'PECI_CPU1', '90', '-10', '80', '-5', '70', '0'); -INSERT INTO `tsg_threshold` VALUES ('95', '{{ SN }}_mxn_cpu', 'laLoad_1', '99', null, '85', null, null, null); -INSERT INTO `tsg_threshold` VALUES ('96', '{{ SN }}_mcn0_cpu', 'laLoad_1', '99', null, '85', null, null, null); -INSERT INTO `tsg_threshold` VALUES ('97', '{{ SN }}_mcn1_cpu', 'laLoad_1', '99', null, '85', null, null, null); -INSERT INTO `tsg_threshold` VALUES ('98', '{{ SN }}_mcn2_cpu', 'laLoad_1', '99', null, '85', null, null, null); -INSERT INTO `tsg_threshold` VALUES ('99', '{{ SN }}_mcn3_cpu', 'laLoad_1', '99', null, '85', null, null, null); -INSERT INTO `tsg_threshold` VALUES ('100', '{{ SN }}_mxn_cpu', 'laLoad_5', '99', null, '85', null, null, null); -INSERT INTO `tsg_threshold` VALUES ('101', '{{ SN }}_mcn0_cpu', 'laLoad_5', '99', null, '85', null, null, null); -INSERT INTO `tsg_threshold` VALUES ('102', '{{ SN }}_mcn1_cpu', 'laLoad_5', '99', null, '85', null, null, null); -INSERT INTO `tsg_threshold` VALUES ('103', '{{ SN }}_mcn2_cpu', 'laLoad_5', '99', null, '85', null, null, null); -INSERT INTO `tsg_threshold` VALUES ('104', '{{ SN }}_mcn3_cpu', 'laLoad_5', '99', null, '85', null, null, null); -INSERT INTO `tsg_threshold` VALUES ('105', '{{ SN }}_mxn_cpu', 'laLoad_10', '99', null, '85', null, null, null); -INSERT INTO `tsg_threshold` VALUES ('106', '{{ SN }}_mcn0_cpu', 'laLoad_10', '99', null, '85', null, null, null); -INSERT INTO `tsg_threshold` VALUES ('107', '{{ SN }}_mcn1_cpu', 'laLoad_10', '99', null, '85', null, null, null); -INSERT INTO `tsg_threshold` VALUES ('108', '{{ SN }}_mcn2_cpu', 'laLoad_10', '99', null, '85', null, null, null); -INSERT INTO `tsg_threshold` VALUES ('109', '{{ SN }}_mcn3_cpu', 'laLoad_10', '99', null, '85', null, null, null); +INSERT INTO `tsg_threshold` VALUES ('3', '{{ SN }}_mxn_hardware', 'COME_TEMP', '90', '-10', '76', '-5', null, null); +INSERT INTO `tsg_threshold` VALUES ('4', '{{ SN }}_mxn_hardware', 'RRC_TEMP', '90', '-10', '76', '-5', null, null); +INSERT INTO `tsg_threshold` VALUES ('5', '{{ SN }}_mxn_hardware', 'P1V', '1.15', '0.85', '1.1', '0.9', null, null); +INSERT INTO `tsg_threshold` VALUES ('6', '{{ SN }}_mxn_hardware', 'PVDDS', '1.07', '0.71', '1.04', '0.73', null, null); +INSERT INTO `tsg_threshold` VALUES ('7', '{{ SN }}_mxn_hardware', 'PVDDF', '1.12', '0.71', '1.1', '0.73', null, null); +INSERT INTO `tsg_threshold` VALUES ('8', '{{ SN }}_mxn_hardware', 'P3V3', '3.636', '2.964', '3.535', '3.066', null, null); +INSERT INTO `tsg_threshold` VALUES ('9', '{{ SN }}_mxn_hardware', 'P5V', '5.745', '4.234', '5.494', '4.486', null, null); +INSERT INTO `tsg_threshold` VALUES ('10', '{{ SN }}_mxn_hardware', 'P12V', '13.583', '10.415', '13.072', '10.926', null, null); +INSERT INTO `tsg_threshold` VALUES ('11', '{{ SN }}_mxn_hardware', 'P1V_RT', '1.15', '0.85', '1.1', '0.9', null, null); +INSERT INTO `tsg_threshold` VALUES ('12', '{{ SN }}_mxn_hardware', 'Fan_1', '9472', '512', '8672', '672', null, null); +INSERT INTO `tsg_threshold` VALUES ('13', '{{ SN }}_mxn_hardware', 'Fan_2', '9472', '512', '8672', '672', null, null); +INSERT INTO `tsg_threshold` VALUES ('14', '{{ SN }}_mxn_hardware', 'Fan_3', '9472', '512', '8672', '672', null, null); +INSERT INTO `tsg_threshold` VALUES ('15', '{{ SN }}_mcn0_hardware', 'HS_Current0', '40.25', '0', '37.25', '0', null, null); +INSERT INTO `tsg_threshold` VALUES ('16', '{{ SN }}_mcn1_hardware', 'HS_Current0', '40.25', '0', '37.25', '0', null, null); +INSERT INTO `tsg_threshold` VALUES ('17', '{{ SN }}_mcn2_hardware', 'HS_Current0', '40.25', '0', '37.25', '0', null, null); +INSERT INTO `tsg_threshold` VALUES ('18', '{{ SN }}_mcn3_hardware', 'HS_Current0', '40.25', '0', '37.25', '0', null, null); +INSERT INTO `tsg_threshold` VALUES ('19', '{{ SN }}_mcn0_hardware', 'HS_Volt0', '12.75', '10.5', '12.5', '10.875', null, null); +INSERT INTO `tsg_threshold` VALUES ('20', '{{ SN }}_mcn1_hardware', 'HS_Volt0', '12.75', '10.5', '12.5', '10.875', null, null); +INSERT INTO `tsg_threshold` VALUES ('21', '{{ SN }}_mcn2_hardware', 'HS_Volt0', '12.75', '10.5', '12.5', '10.875', null, null); +INSERT INTO `tsg_threshold` VALUES ('22', '{{ SN }}_mcn3_hardware', 'HS_Volt0', '12.75', '10.5', '12.5', '10.875', null, null); +INSERT INTO `tsg_threshold` VALUES ('23', '{{ SN }}_mcn0_hardware', 'P1V05_PCH', '1.147', '0.941', '1.117', '0.97', null, null); +INSERT INTO `tsg_threshold` VALUES ('24', '{{ SN }}_mcn1_hardware', 'P1V05_PCH', '1.147', '0.941', '1.117', '0.97', null, null); +INSERT INTO `tsg_threshold` VALUES ('25', '{{ SN }}_mcn2_hardware', 'P1V05_PCH', '1.147', '0.941', '1.117', '0.97', null, null); +INSERT INTO `tsg_threshold` VALUES ('26', '{{ SN }}_mcn3_hardware', 'P1V05_PCH', '1.147', '0.941', '1.117', '0.97', null, null); +INSERT INTO `tsg_threshold` VALUES ('27', '{{ SN }}_mcn0_hardware', 'P1V2_DDR0', '1.303', '1.078', '1.284', '1.117', null, null); +INSERT INTO `tsg_threshold` VALUES ('28', '{{ SN }}_mcn1_hardware', 'P1V2_DDR0', '1.303', '1.078', '1.284', '1.117', null, null); +INSERT INTO `tsg_threshold` VALUES ('29', '{{ SN }}_mcn2_hardware', 'P1V2_DDR0', '1.303', '1.078', '1.284', '1.117', null, null); +INSERT INTO `tsg_threshold` VALUES ('30', '{{ SN }}_mcn3_hardware', 'P1V2_DDR0', '1.303', '1.078', '1.284', '1.117', null, null); +INSERT INTO `tsg_threshold` VALUES ('31', '{{ SN }}_mcn0_hardware', 'P1V2_DDR1', '1.303', '1.078', '1.284', '1.117', null, null); +INSERT INTO `tsg_threshold` VALUES ('32', '{{ SN }}_mcn1_hardware', 'P1V2_DDR1', '1.303', '1.078', '1.284', '1.117', null, null); +INSERT INTO `tsg_threshold` VALUES ('33', '{{ SN }}_mcn2_hardware', 'P1V2_DDR1', '1.303', '1.078', '1.284', '1.117', null, null); +INSERT INTO `tsg_threshold` VALUES ('34', '{{ SN }}_mcn3_hardware', 'P1V2_DDR1', '1.303', '1.078', '1.284', '1.117', null, null); +INSERT INTO `tsg_threshold` VALUES ('35', '{{ SN }}_mcn0_hardware', 'P3V3', '3.569', '2.945', '3.51', '3.042', null, null); +INSERT INTO `tsg_threshold` VALUES ('36', '{{ SN }}_mcn1_hardware', 'P3V3', '3.569', '2.945', '3.51', '3.042', null, null); +INSERT INTO `tsg_threshold` VALUES ('37', '{{ SN }}_mcn2_hardware', 'P3V3', '3.569', '2.945', '3.51', '3.042', null, null); +INSERT INTO `tsg_threshold` VALUES ('38', '{{ SN }}_mcn3_hardware', 'P3V3', '3.569', '2.945', '3.51', '3.042', null, null); +INSERT INTO `tsg_threshold` VALUES ('39', '{{ SN }}_mcn0_hardware', 'P5V', '5.453', '4.494', '5.343', '4.631', null, null); +INSERT INTO `tsg_threshold` VALUES ('40', '{{ SN }}_mcn1_hardware', 'P5V', '5.453', '4.494', '5.343', '4.631', null, null); +INSERT INTO `tsg_threshold` VALUES ('41', '{{ SN }}_mcn2_hardware', 'P5V', '5.453', '4.494', '5.343', '4.631', null, null); +INSERT INTO `tsg_threshold` VALUES ('42', '{{ SN }}_mcn3_hardware', 'P5V', '5.453', '4.494', '5.343', '4.631', null, null); +INSERT INTO `tsg_threshold` VALUES ('43', '{{ SN }}_mcn0_hardware', 'PVCCIN_CPU0', '2.019', '1.323', '1.98', '1.343', null, null); +INSERT INTO `tsg_threshold` VALUES ('44', '{{ SN }}_mcn1_hardware', 'PVCCIN_CPU0', '2.019', '1.323', '1.98', '1.343', null, null); +INSERT INTO `tsg_threshold` VALUES ('45', '{{ SN }}_mcn2_hardware', 'PVCCIN_CPU0', '2.019', '1.323', '1.98', '1.343', null, null); +INSERT INTO `tsg_threshold` VALUES ('46', '{{ SN }}_mcn3_hardware', 'PVCCIN_CPU0', '2.019', '1.323', '1.98', '1.343', null, null); +INSERT INTO `tsg_threshold` VALUES ('47', '{{ SN }}_mcn0_hardware', 'PVCCIN_CPU1', '2.019', '1.323', '1.98', '1.343', null, null); +INSERT INTO `tsg_threshold` VALUES ('48', '{{ SN }}_mcn1_hardware', 'PVCCIN_CPU1', '2.019', '1.323', '1.98', '1.343', null, null); +INSERT INTO `tsg_threshold` VALUES ('49', '{{ SN }}_mcn2_hardware', 'PVCCIN_CPU1', '2.019', '1.323', '1.98', '1.343', null, null); +INSERT INTO `tsg_threshold` VALUES ('50', '{{ SN }}_mcn3_hardware', 'PVCCIN_CPU1', '2.019', '1.323', '1.98', '1.343', null, null); +INSERT INTO `tsg_threshold` VALUES ('51', '{{ SN }}_mcn0_hardware', 'PVCCIO', '1.029', '0.853', '1.009', '0.882', null, null); +INSERT INTO `tsg_threshold` VALUES ('52', '{{ SN }}_mcn1_hardware', 'PVCCIO', '1.029', '0.853', '1.009', '0.882', null, null); +INSERT INTO `tsg_threshold` VALUES ('53', '{{ SN }}_mcn2_hardware', 'PVCCIO', '1.029', '0.853', '1.009', '0.882', null, null); +INSERT INTO `tsg_threshold` VALUES ('54', '{{ SN }}_mcn3_hardware', 'PVCCIO', '1.029', '0.853', '1.009', '0.882', null, null); +INSERT INTO `tsg_threshold` VALUES ('55', '{{ SN }}_mcn0_hardware', 'Temp_LL', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('56', '{{ SN }}_mcn1_hardware', 'Temp_LL', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('57', '{{ SN }}_mcn2_hardware', 'Temp_LL', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('58', '{{ SN }}_mcn3_hardware', 'Temp_LL', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('59', '{{ SN }}_mcn0_hardware', 'Temp_LR', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('60', '{{ SN }}_mcn1_hardware', 'Temp_LR', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('61', '{{ SN }}_mcn2_hardware', 'Temp_LR', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('62', '{{ SN }}_mcn3_hardware', 'Temp_LR', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('63', '{{ SN }}_mcn0_hardware', 'Temp_PCH', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('64', '{{ SN }}_mcn1_hardware', 'Temp_PCH', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('65', '{{ SN }}_mcn2_hardware', 'Temp_PCH', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('66', '{{ SN }}_mcn3_hardware', 'Temp_PCH', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('67', '{{ SN }}_mcn0_hardware', 'Temp_UL', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('68', '{{ SN }}_mcn1_hardware', 'Temp_UL', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('69', '{{ SN }}_mcn2_hardware', 'Temp_UL', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('70', '{{ SN }}_mcn3_hardware', 'Temp_UL', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('71', '{{ SN }}_mcn0_hardware', 'Temp_UR', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('72', '{{ SN }}_mcn1_hardware', 'Temp_UR', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('73', '{{ SN }}_mcn2_hardware', 'Temp_UR', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('74', '{{ SN }}_mcn3_hardware', 'Temp_UR', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('75', '{{ SN }}_mcn0_hardware', 'Temp_XL710_82599', '90', '-10', '80', '-5', null, null); +INSERT INTO `tsg_threshold` VALUES ('76', '{{ SN }}_mcn1_hardware', 'Temp_XL710_82599', '90', '-10', '80', '-5', null, null); +INSERT INTO `tsg_threshold` VALUES ('77', '{{ SN }}_mcn2_hardware', 'Temp_XL710_82599', '90', '-10', '80', '-5', null, null); +INSERT INTO `tsg_threshold` VALUES ('78', '{{ SN }}_mcn3_hardware', 'Temp_XL710_82599', '90', '-10', '80', '-5', null, null); +INSERT INTO `tsg_threshold` VALUES ('79', '{{ SN }}_mcn0_hardware', 'Temp_mIO0', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('80', '{{ SN }}_mcn1_hardware', 'Temp_mIO0', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('81', '{{ SN }}_mcn2_hardware', 'Temp_mIO0', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('82', '{{ SN }}_mcn3_hardware', 'Temp_mIO0', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('83', '{{ SN }}_mcn0_hardware', 'Temp_mIO1', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('84', '{{ SN }}_mcn1_hardware', 'Temp_mIO1', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('85', '{{ SN }}_mcn2_hardware', 'Temp_mIO1', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('86', '{{ SN }}_mcn3_hardware', 'Temp_mIO1', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('87', '{{ SN }}_mcn0_hardware', 'PECI_CPU0', '90', '-10', '80', '-5', null, null); +INSERT INTO `tsg_threshold` VALUES ('88', '{{ SN }}_mcn1_hardware', 'PECI_CPU0', '90', '-10', '80', '-5', null, null); +INSERT INTO `tsg_threshold` VALUES ('89', '{{ SN }}_mcn2_hardware', 'PECI_CPU0', '90', '-10', '80', '-5', null, null); +INSERT INTO `tsg_threshold` VALUES ('90', '{{ SN }}_mcn3_hardware', 'PECI_CPU0', '90', '-10', '80', '-5', null, null); +INSERT INTO `tsg_threshold` VALUES ('91', '{{ SN }}_mcn0_hardware', 'PECI_CPU1', '90', '-10', '80', '-5', null, null); +INSERT INTO `tsg_threshold` VALUES ('92', '{{ SN }}_mcn1_hardware', 'PECI_CPU1', '90', '-10', '80', '-5', null, null); +INSERT INTO `tsg_threshold` VALUES ('93', '{{ SN }}_mcn2_hardware', 'PECI_CPU1', '90', '-10', '80', '-5', null, null); +INSERT INTO `tsg_threshold` VALUES ('94', '{{ SN }}_mcn3_hardware', 'PECI_CPU1', '90', '-10', '80', '-5', null, null); +INSERT INTO `tsg_threshold` VALUES ('95', '{{ SN }}_mxn_cpu', 'laLoad_1', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('96', '{{ SN }}_mcn0_cpu', 'laLoad_1', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('97', '{{ SN }}_mcn1_cpu', 'laLoad_1', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('98', '{{ SN }}_mcn2_cpu', 'laLoad_1', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('99', '{{ SN }}_mcn3_cpu', 'laLoad_1', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('100', '{{ SN }}_mxn_cpu', 'laLoad_5', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('101', '{{ SN }}_mcn0_cpu', 'laLoad_5', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('102', '{{ SN }}_mcn1_cpu', 'laLoad_5', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('103', '{{ SN }}_mcn2_cpu', 'laLoad_5', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('104', '{{ SN }}_mcn3_cpu', 'laLoad_5', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('105', '{{ SN }}_mxn_cpu', 'laLoad_10', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('106', '{{ SN }}_mcn0_cpu', 'laLoad_10', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('107', '{{ SN }}_mcn1_cpu', 'laLoad_10', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('108', '{{ SN }}_mcn2_cpu', 'laLoad_10', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('109', '{{ SN }}_mcn3_cpu', 'laLoad_10', null, null, null, null, null, null); INSERT INTO `tsg_threshold` VALUES ('110', '{{ SN }}_mxn_cpu', 'ssCpuUser', null, null, null, null, null, null); INSERT INTO `tsg_threshold` VALUES ('111', '{{ SN }}_mcn0_cpu', 'ssCpuUser', null, null, null, null, null, null); INSERT INTO `tsg_threshold` VALUES ('112', '{{ SN }}_mcn1_cpu', 'ssCpuUser', null, null, null, null, null, null); @@ -156,11 +156,11 @@ INSERT INTO `tsg_threshold` VALUES ('116', '{{ SN }}_mcn0_cpu', 'ssCpuSystem', n INSERT INTO `tsg_threshold` VALUES ('117', '{{ SN }}_mcn1_cpu', 'ssCpuSystem', null, null, null, null, null, null); INSERT INTO `tsg_threshold` VALUES ('118', '{{ SN }}_mcn2_cpu', 'ssCpuSystem', null, null, null, null, null, null); INSERT INTO `tsg_threshold` VALUES ('119', '{{ SN }}_mcn3_cpu', 'ssCpuSystem', null, null, null, null, null, null); -INSERT INTO `tsg_threshold` VALUES ('120', '{{ SN }}_mxn_cpu', 'ssCpuIdle', null, '15', null, '30', null, '40'); -INSERT INTO `tsg_threshold` VALUES ('121', '{{ SN }}_mcn0_cpu', 'ssCpuIdle', null, '15', null, '30', null, '40'); -INSERT INTO `tsg_threshold` VALUES ('122', '{{ SN }}_mcn1_cpu', 'ssCpuIdle', null, '15', null, '30', null, '40'); -INSERT INTO `tsg_threshold` VALUES ('123', '{{ SN }}_mcn2_cpu', 'ssCpuIdle', null, '15', null, '30', null, '40'); -INSERT INTO `tsg_threshold` VALUES ('124', '{{ SN }}_mcn3_cpu', 'ssCpuIdle', null, '15', null, '30', null, '40'); +INSERT INTO `tsg_threshold` VALUES ('120', '{{ SN }}_mxn_cpu', 'ssCpuIdle', null, null, null, null, null, null); +INSERT INTO `tsg_threshold` VALUES ('121', '{{ SN }}_mcn0_cpu', 'ssCpuIdle', null, '10', null, '15', null, null); +INSERT INTO `tsg_threshold` VALUES ('122', '{{ SN }}_mcn1_cpu', 'ssCpuIdle', null, '10', null, '15', null, null); +INSERT INTO `tsg_threshold` VALUES ('123', '{{ SN }}_mcn2_cpu', 'ssCpuIdle', null, '10', null, '15', null, null); +INSERT INTO `tsg_threshold` VALUES ('124', '{{ SN }}_mcn3_cpu', 'ssCpuIdle', null, '10', null, '15', null, null); INSERT INTO `tsg_threshold` VALUES ('125', '{{ SN }}_mxn_memory', 'memTotalReal', null, null, null, null, null, null); INSERT INTO `tsg_threshold` VALUES ('126', '{{ SN }}_mcn0_memory', 'memTotalReal', null, null, null, null, null, null); INSERT INTO `tsg_threshold` VALUES ('127', '{{ SN }}_mcn1_memory', 'memTotalReal', null, null, null, null, null, null); @@ -201,11 +201,11 @@ INSERT INTO `tsg_threshold` VALUES ('161', '{{ SN }}_mcn0_disk', 'dskAvail', nul INSERT INTO `tsg_threshold` VALUES ('162', '{{ SN }}_mcn1_disk', 'dskAvail', null, null, null, null, null, null); INSERT INTO `tsg_threshold` VALUES ('163', '{{ SN }}_mcn2_disk', 'dskAvail', null, null, null, null, null, null); INSERT INTO `tsg_threshold` VALUES ('164', '{{ SN }}_mcn3_disk', 'dskAvail', null, null, null, null, null, null); -INSERT INTO `tsg_threshold` VALUES ('165', '{{ SN }}_mxn_disk', 'dskPercent', '90', null, '80', null, '70', null); -INSERT INTO `tsg_threshold` VALUES ('166', '{{ SN }}_mcn0_disk', 'dskPercent', '90', null, '80', null, '70', null); -INSERT INTO `tsg_threshold` VALUES ('167', '{{ SN }}_mcn1_disk', 'dskPercent', '90', null, '80', null, '70', null); -INSERT INTO `tsg_threshold` VALUES ('168', '{{ SN }}_mcn2_disk', 'dskPercent', '90', null, '80', null, '70', null); -INSERT INTO `tsg_threshold` VALUES ('169', '{{ SN }}_mcn3_disk', 'dskPercent', '90', null, '80', null, '70', null); +INSERT INTO `tsg_threshold` VALUES ('165', '{{ SN }}_mxn_disk', 'dskPercent', '90', null, '85', null, null, null); +INSERT INTO `tsg_threshold` VALUES ('166', '{{ SN }}_mcn0_disk', 'dskPercent', '90', null, '85', null, null, null); +INSERT INTO `tsg_threshold` VALUES ('167', '{{ SN }}_mcn1_disk', 'dskPercent', '90', null, '85', null, null, null); +INSERT INTO `tsg_threshold` VALUES ('168', '{{ SN }}_mcn2_disk', 'dskPercent', '90', null, '85', null, null, null); +INSERT INTO `tsg_threshold` VALUES ('169', '{{ SN }}_mcn3_disk', 'dskPercent', '90', null, '85', null, null, null); INSERT INTO `tsg_threshold` VALUES ('170', '{{ SN }}_mxn_disk', 'dskPercentSled', null, null, null, null, null, null); INSERT INTO `tsg_threshold` VALUES ('171', '{{ SN }}_mcn0_disk', 'dskPercentSled', null, null, null, null, null, null); INSERT INTO `tsg_threshold` VALUES ('172', '{{ SN }}_mcn1_disk', 'dskPercentSled', null, null, null, null, null, null); @@ -271,17 +271,17 @@ INSERT INTO `tsg_threshold` VALUES ('231', '{{ SN }}_mxn_network_port_39', 'ifOu INSERT INTO `tsg_threshold` VALUES ('232', '{{ SN }}_mxn_network_port_41', 'ifOutUcastPkts', null, null, null, null, null, null); INSERT INTO `tsg_threshold` VALUES ('233', '{{ SN }}_mxn_network_port_43', 'ifOutUcastPkts', null, null, null, null, null, null); INSERT INTO `tsg_threshold` VALUES ('234', '{{ SN }}_mxn_memory', 'memPercent', null, null, null, null, null, null); -INSERT INTO `tsg_threshold` VALUES ('235', '{{ SN }}_mcn0_memory', 'memPercent', '0.9', null, '0.8', null, '0.7', null); -INSERT INTO `tsg_threshold` VALUES ('236', '{{ SN }}_mcn1_memory', 'memPercent', '0.9', null, '0.8', null, '0.7', null); -INSERT INTO `tsg_threshold` VALUES ('237', '{{ SN }}_mcn2_memory', 'memPercent', '0.9', null, '0.8', null, '0.7', null); -INSERT INTO `tsg_threshold` VALUES ('238', '{{ SN }}_mcn3_memory', 'memPercent', '0.9', null, '0.8', null, '0.7', null); -INSERT INTO `tsg_threshold` VALUES ('239', '{{ SN }}_mcn0_app', 'AppRxLoss', '0.0005', null, '0.0001', null, '0.00001', null); -INSERT INTO `tsg_threshold` VALUES ('240', '{{ SN }}_mcn0_app', 'AppTxLoss', '0.0005', null, '0.0001', null, '0.00001', null); -INSERT INTO `tsg_threshold` VALUES ('241', '{{ SN }}_mcn0_interface', 'PhyRxLoss', '0.0005', null, '0.0001', null, '0.00001', null); -INSERT INTO `tsg_threshold` VALUES ('242', '{{ SN }}_mcn1_interface', 'PhyRxLoss', '0.0005', null, '0.0001', null, '0.00001', null); -INSERT INTO `tsg_threshold` VALUES ('243', '{{ SN }}_mcn2_interface', 'PhyRxLoss', '0.0005', null, '0.0001', null, '0.00001', null); -INSERT INTO `tsg_threshold` VALUES ('244', '{{ SN }}_mcn3_interface', 'PhyRxLoss', '0.0005', null, '0.0001', null, '0.00001', null); -INSERT INTO `tsg_threshold` VALUES ('245', '{{ SN }}_mcn0_interface', 'PhyTxLoss', '0.0005', null, '0.0001', null, '0.00001', null); -INSERT INTO `tsg_threshold` VALUES ('246', '{{ SN }}_mcn1_interface', 'PhyTxLoss', '0.0005', null, '0.0001', null, '0.00001', null); -INSERT INTO `tsg_threshold` VALUES ('247', '{{ SN }}_mcn2_interface', 'PhyTxLoss', '0.0005', null, '0.0001', null, '0.00001', null); -INSERT INTO `tsg_threshold` VALUES ('248', '{{ SN }}_mcn3_interface', 'PhyTxLoss', '0.0005', null, '0.0001', null, '0.00001', null); +INSERT INTO `tsg_threshold` VALUES ('235', '{{ SN }}_mcn0_memory', 'memPercent', '0.9', null, '0.85', null, null, null); +INSERT INTO `tsg_threshold` VALUES ('236', '{{ SN }}_mcn1_memory', 'memPercent', '0.9', null, '0.85', null, null, null); +INSERT INTO `tsg_threshold` VALUES ('237', '{{ SN }}_mcn2_memory', 'memPercent', '0.9', null, '0.85', null, null, null); +INSERT INTO `tsg_threshold` VALUES ('238', '{{ SN }}_mcn3_memory', 'memPercent', '0.9', null, '0.85', null, null, null); +INSERT INTO `tsg_threshold` VALUES ('239', '{{ SN }}_mcn0_app', 'AppRxLoss', '0.0005', null, '0.0001', null, null, null); +INSERT INTO `tsg_threshold` VALUES ('240', '{{ SN }}_mcn0_app', 'AppTxLoss', '0.0005', null, '0.0001', null, null, null); +INSERT INTO `tsg_threshold` VALUES ('241', '{{ SN }}_mcn0_interface', 'PhyRxLoss', '0.0005', null, '0.0001', null, null, null); +INSERT INTO `tsg_threshold` VALUES ('242', '{{ SN }}_mcn1_interface', 'PhyRxLoss', '0.0005', null, '0.0001', null, null, null); +INSERT INTO `tsg_threshold` VALUES ('243', '{{ SN }}_mcn2_interface', 'PhyRxLoss', '0.0005', null, '0.0001', null, null, null); +INSERT INTO `tsg_threshold` VALUES ('244', '{{ SN }}_mcn3_interface', 'PhyRxLoss', '0.0005', null, '0.0001', null, null, null); +INSERT INTO `tsg_threshold` VALUES ('245', '{{ SN }}_mcn0_interface', 'PhyTxLoss', '0.0005', null, '0.0001', null, null, null); +INSERT INTO `tsg_threshold` VALUES ('246', '{{ SN }}_mcn1_interface', 'PhyTxLoss', '0.0005', null, '0.0001', null, null, null); +INSERT INTO `tsg_threshold` VALUES ('247', '{{ SN }}_mcn2_interface', 'PhyTxLoss', '0.0005', null, '0.0001', null, null, null); +INSERT INTO `tsg_threshold` VALUES ('248', '{{ SN }}_mcn3_interface', 'PhyTxLoss', '0.0005', null, '0.0001', null, null, null); diff --git a/roles/tsg-cli-mcn0/templates/tsg_cli_env.ini.j2 b/roles/tsg-cli-mcn0/templates/tsg_cli_env.ini.j2 index 3b891d8..d962f51 100644 --- a/roles/tsg-cli-mcn0/templates/tsg_cli_env.ini.j2 +++ b/roles/tsg-cli-mcn0/templates/tsg_cli_env.ini.j2 @@ -21,9 +21,13 @@ fs2_stat_file=/var/log/tfe/tfe.fs2 [threshold] #means percent, n% -cpu_critical_high=90 -cpu_major_high=80 -mem_critical_high=90 -mem_major_high=80 -disk_critical_high=90 -disk_major_high=80 +cpu_critical_high={{ oam.alarm_cpu_critical_high }} +cpu_major_high={{ oam.alarm_cpu_major_high }} +mem_critical_high={{ oam.alarm_mem_critical_high }} +mem_major_high={{ oam.alarm_mem_major_high }} +disk_critical_high={{ oam.alarm_disk_critical_high }} +disk_major_high={{ oam.alarm_disk_major_high }} +interface_critical_high={{ oam.alarm_interface_critical_high }} +interface_major_high={{ oam.alarm_interface_major_high }} +app_network_critical_high={{ oam.alarm_app_network_critical_high }} +app_network_major_high={{ oam.alarm_app_network_major_high }} diff --git a/roles/tsg-cli-mcn1/templates/tsg_cli_env.ini.j2 b/roles/tsg-cli-mcn1/templates/tsg_cli_env.ini.j2 index 3b891d8..ae5942d 100644 --- a/roles/tsg-cli-mcn1/templates/tsg_cli_env.ini.j2 +++ b/roles/tsg-cli-mcn1/templates/tsg_cli_env.ini.j2 @@ -21,9 +21,13 @@ fs2_stat_file=/var/log/tfe/tfe.fs2 [threshold] #means percent, n% -cpu_critical_high=90 -cpu_major_high=80 -mem_critical_high=90 -mem_major_high=80 -disk_critical_high=90 -disk_major_high=80 +cpu_critical_high={{ oam.alarm_cpu_critical_high }} +cpu_major_high={{ oam.alarm_cpu_major_high }} +mem_critical_high={{ oam.alarm_mem_critical_high }} +mem_major_high={{ oam.alarm_mem_major_high }} +disk_critical_high={{ oam.alarm_disk_critical_high }} +disk_major_high={{ oam.alarm_disk_major_high }} +interface_critical_high={{ oam.alarm_interface_critical_high }} +interface_major_high={{ oam.alarm_interface_major_high }} +app_network_critical_high={{ oam.alarm_app_network_critical_high }} +app_network_major_high={{ oam.alarm_app_network_major_high }} \ No newline at end of file diff --git a/roles/tsg-cli-mcn2/templates/tsg_cli_env.ini.j2 b/roles/tsg-cli-mcn2/templates/tsg_cli_env.ini.j2 index 3b891d8..d962f51 100644 --- a/roles/tsg-cli-mcn2/templates/tsg_cli_env.ini.j2 +++ b/roles/tsg-cli-mcn2/templates/tsg_cli_env.ini.j2 @@ -21,9 +21,13 @@ fs2_stat_file=/var/log/tfe/tfe.fs2 [threshold] #means percent, n% -cpu_critical_high=90 -cpu_major_high=80 -mem_critical_high=90 -mem_major_high=80 -disk_critical_high=90 -disk_major_high=80 +cpu_critical_high={{ oam.alarm_cpu_critical_high }} +cpu_major_high={{ oam.alarm_cpu_major_high }} +mem_critical_high={{ oam.alarm_mem_critical_high }} +mem_major_high={{ oam.alarm_mem_major_high }} +disk_critical_high={{ oam.alarm_disk_critical_high }} +disk_major_high={{ oam.alarm_disk_major_high }} +interface_critical_high={{ oam.alarm_interface_critical_high }} +interface_major_high={{ oam.alarm_interface_major_high }} +app_network_critical_high={{ oam.alarm_app_network_critical_high }} +app_network_major_high={{ oam.alarm_app_network_major_high }} diff --git a/roles/tsg-cli-mcn3/templates/tsg_cli_env.ini.j2 b/roles/tsg-cli-mcn3/templates/tsg_cli_env.ini.j2 index 3b891d8..d962f51 100644 --- a/roles/tsg-cli-mcn3/templates/tsg_cli_env.ini.j2 +++ b/roles/tsg-cli-mcn3/templates/tsg_cli_env.ini.j2 @@ -21,9 +21,13 @@ fs2_stat_file=/var/log/tfe/tfe.fs2 [threshold] #means percent, n% -cpu_critical_high=90 -cpu_major_high=80 -mem_critical_high=90 -mem_major_high=80 -disk_critical_high=90 -disk_major_high=80 +cpu_critical_high={{ oam.alarm_cpu_critical_high }} +cpu_major_high={{ oam.alarm_cpu_major_high }} +mem_critical_high={{ oam.alarm_mem_critical_high }} +mem_major_high={{ oam.alarm_mem_major_high }} +disk_critical_high={{ oam.alarm_disk_critical_high }} +disk_major_high={{ oam.alarm_disk_major_high }} +interface_critical_high={{ oam.alarm_interface_critical_high }} +interface_major_high={{ oam.alarm_interface_major_high }} +app_network_critical_high={{ oam.alarm_app_network_critical_high }} +app_network_major_high={{ oam.alarm_app_network_major_high }} diff --git a/roles/tsg-cli-mxn/files/tsg-monitor.service b/roles/tsg-cli-mxn/files/tsg-monitor.service.bak similarity index 100% rename from roles/tsg-cli-mxn/files/tsg-monitor.service rename to roles/tsg-cli-mxn/files/tsg-monitor.service.bak diff --git a/roles/tsg-cli-mxn/files/tsg-monitor.sh b/roles/tsg-cli-mxn/files/tsg-monitor.sh.bak similarity index 100% rename from roles/tsg-cli-mxn/files/tsg-monitor.sh rename to roles/tsg-cli-mxn/files/tsg-monitor.sh.bak diff --git a/roles/tsg-cli-mxn/files/tsg_cluster_register.service b/roles/tsg-cli-mxn/files/tsg_cluster_register.service new file mode 100644 index 0000000..fdaded3 --- /dev/null +++ b/roles/tsg-cli-mxn/files/tsg_cluster_register.service @@ -0,0 +1,13 @@ +[Unit] +Description=TSG Device register to consul +Requires=consul-client.service +After=consul-client.service + +[Service] +ExecStart=/opt/tsg/tsg-monitor/tsg_cluster_register +Type=oneshot +RemainAfterExit=yes + + +[Install] +WantedBy=multi-user.target \ No newline at end of file diff --git a/roles/tsg-cli-mxn/tasks/main.yml b/roles/tsg-cli-mxn/tasks/main.yml index 8577032..2210e16 100644 --- a/roles/tsg-cli-mxn/tasks/main.yml +++ b/roles/tsg-cli-mxn/tasks/main.yml @@ -74,17 +74,18 @@ dest: "/opt/tsg/etc/tsg_series.json" tags: template - -- name: "copy tsg-monitor.service to destination server" +#2020-11-13 lijia modify +- name: "copy tsg_cluster_register.service to destination server" synchronize: - src: "{{ role_path }}/files/tsg-monitor.service" + src: "{{ role_path }}/files/tsg_cluster_register.service" dest: "/usr/lib/systemd/system" -- name: "copy tsg-monitor.sh to destination server" - copy: - src: "{{ role_path }}/files/tsg-monitor.sh" - dest: "/opt/tsg/tsg-monitor/" - mode: 0755 +# 2020-11-13 lijia close +#- name: "copy tsg-monitor.sh to destination server" +# copy: +# src: "{{ role_path }}/files/tsg-monitor.sh" +# dest: "/opt/tsg/tsg-monitor/" +# mode: 0755 - name: "copy rsyslog.conf to destination server" synchronize: @@ -95,10 +96,11 @@ systemd: name: rsyslog state: restarted - -- name: "enable tsg-monitor service" + + +- name: "enable tsg_cluster_register.service" systemd: - name: tsg-monitor + name: tsg_cluster_register enabled: yes daemon_reload: yes state: restarted diff --git a/roles/tsg-cli-mxn/templates/tsg_cli_env.ini.j2 b/roles/tsg-cli-mxn/templates/tsg_cli_env.ini.j2 index f928a12..04412e0 100644 --- a/roles/tsg-cli-mxn/templates/tsg_cli_env.ini.j2 +++ b/roles/tsg-cli-mxn/templates/tsg_cli_env.ini.j2 @@ -17,3 +17,18 @@ fs2_stat_file=/home/mesasoft/sapp_run/fs2_kni.status [tfe] fs2_stat_file=/var/log/tfe/tfe.fs2 + + + +[threshold] +#means percent, n% +cpu_critical_high={{ oam.alarm_cpu_critical_high }} +cpu_major_high={{ oam.alarm_cpu_major_high }} +mem_critical_high={{ oam.alarm_mem_critical_high }} +mem_major_high={{ oam.alarm_mem_major_high }} +disk_critical_high={{ oam.alarm_disk_critical_high }} +disk_major_high={{ oam.alarm_disk_major_high }} +interface_critical_high={{ oam.alarm_interface_critical_high }} +interface_major_high={{ oam.alarm_interface_major_high }} +app_network_critical_high={{ oam.alarm_app_network_critical_high }} +app_network_major_high={{ oam.alarm_app_network_major_high }} \ No newline at end of file diff --git a/roles/tsg-common-files/tsg-cli-1.1.1.ea016fc-1.el7.x86_64.rpm b/roles/tsg-common-files/tsg-cli-1.1.2.93221a7-1.el7.x86_64.rpm similarity index 91% rename from roles/tsg-common-files/tsg-cli-1.1.1.ea016fc-1.el7.x86_64.rpm rename to roles/tsg-common-files/tsg-cli-1.1.2.93221a7-1.el7.x86_64.rpm index 160e489..d305de2 100644 Binary files a/roles/tsg-common-files/tsg-cli-1.1.1.ea016fc-1.el7.x86_64.rpm and b/roles/tsg-common-files/tsg-cli-1.1.2.93221a7-1.el7.x86_64.rpm differ