[
  {
    "tags": {
      "name": "SCE"
    },
    "fields": {
      "dev_nf_rx_P": 1,
      "dev_nf_rx_B": 160,
      "dev_nf_tx_P": 1,
      "dev_nf_tx_B": 160,
      "kee_d_rx_P": 0,
      "kee_d_rx_B": 0,
      "kee_d_tx_P": 0,
      "kee_d_tx_B": 0,
      "raw_rx_P": 0,
      "raw_rx_B": 0,
      "raw_tx_P": 0,
      "raw_tx_B": 0,
      "dec_rx_P": 0,
      "dec_rx_B": 0,
      "dec_tx_P": 0,
      "dec_tx_B": 0,
      "dev_l3_rx_P": 0,
      "dev_l3_rx_B": 0,
      "dev_l3_tx_P": 0,
      "dev_l3_tx_B": 0,
      "dev_l3_dop_P": 0,
      "dev_l3_dop_B": 0,
      "kee_u_rx_P": 0,
      "kee_u_rx_B": 0,
      "kee_u_rxdop_P": 0,
      "kee_u_rxdop_B": 0,
      "dev_l2_rx_P": 0,
      "dev_l2_rx_B": 0,
      "dev_l2_tx_P": 0,
      "dev_l2_tx_B": 0,
      "dev_l2_dop_P": 0,
      "dev_l2_dop_B": 0,
      "mirr_bypass_P": 0,
      "mirr_bypass_B": 0,
      "mirr_block_P": 0,
      "mirr_block_B": 0,
      "mirr_rxdop_P": 0,
      "mirr_rxdop_B": 0,
      "mirr_tx_P": 0,
      "mirr_tx_B": 0,
      "stee_bypass_P": 0,
      "stee_bypass_B": 0,
      "stee_block_P": 0,
      "stee_block_B": 0,
      "stee_rx_P": 0,
      "stee_rx_B": 0,
      "stee_tx_P": 0,
      "stee_tx_B": 0,
      "miss_sess_P": 0,
      "miss_sess_B": 0,
      "err_bypass_P": 0,
      "err_bypass_B": 0,
      "err_block_P": 0,
      "err_block_B": 0,
      "sf_active": 1,
      "sf_inactive": 0,
      "ctrl_rx_P": 1,
      "ctrl_rx_B": 160,
      "ctrl_tx_P": 1,
      "ctrl_tx_B": 160,
      "ctrl_opening": 0,
      "ctrl_active": 1,
      "ctrl_closing": 0,
      "ctrl_resetall": 0,
      "ctrl_error": 0,
      "curr_sessions": 1,
      "session_logs": 0,
      "session_new": 1,
      "session_free": 0,
      "stateless_inject_P": 0,
      "stateless_inject_B": 0
    },
    "fields_delta": {
      "dev_nf_rx_P": 1,
      "dev_nf_rx_B": 160,
      "dev_nf_tx_P": 1,
      "dev_nf_tx_B": 160,
      "kee_d_rx_P": 0,
      "kee_d_rx_B": 0,
      "kee_d_tx_P": 0,
      "kee_d_tx_B": 0,
      "raw_rx_P": 0,
      "raw_rx_B": 0,
      "raw_tx_P": 0,
      "raw_tx_B": 0,
      "dec_rx_P": 0,
      "dec_rx_B": 0,
      "dec_tx_P": 0,
      "dec_tx_B": 0,
      "dev_l3_rx_P": 0,
      "dev_l3_rx_B": 0,
      "dev_l3_tx_P": 0,
      "dev_l3_tx_B": 0,
      "dev_l3_dop_P": 0,
      "dev_l3_dop_B": 0,
      "kee_u_rx_P": 0,
      "kee_u_rx_B": 0,
      "kee_u_rxdop_P": 0,
      "kee_u_rxdop_B": 0,
      "dev_l2_rx_P": 0,
      "dev_l2_rx_B": 0,
      "dev_l2_tx_P": 0,
      "dev_l2_tx_B": 0,
      "dev_l2_dop_P": 0,
      "dev_l2_dop_B": 0,
      "mirr_bypass_P": 0,
      "mirr_bypass_B": 0,
      "mirr_block_P": 0,
      "mirr_block_B": 0,
      "mirr_rxdop_P": 0,
      "mirr_rxdop_B": 0,
      "mirr_tx_P": 0,
      "mirr_tx_B": 0,
      "stee_bypass_P": 0,
      "stee_bypass_B": 0,
      "stee_block_P": 0,
      "stee_block_B": 0,
      "stee_rx_P": 0,
      "stee_rx_B": 0,
      "stee_tx_P": 0,
      "stee_tx_B": 0,
      "miss_sess_P": 0,
      "miss_sess_B": 0,
      "err_bypass_P": 0,
      "err_bypass_B": 0,
      "err_block_P": 0,
      "err_block_B": 0,
      "sf_active": 1,
      "sf_inactive": 0,
      "ctrl_rx_P": 1,
      "ctrl_rx_B": 160,
      "ctrl_tx_P": 1,
      "ctrl_tx_B": 160,
      "ctrl_opening": 0,
      "ctrl_active": 1,
      "ctrl_closing": 0,
      "ctrl_resetall": 0,
      "ctrl_error": 0,
      "curr_sessions": 1,
      "session_logs": 0,
      "session_new": 1,
      "session_free": 0,
      "stateless_inject_P": 0,
      "stateless_inject_B": 0
    },
    "timestamp_ms": 1731047893641,
    "timestamp_ms_delta": 2004
  }
]