TSG-23386 SCE移除FieldStat2,为适配AArch64做准备

This commit is contained in:
luwenpeng
2024-11-08 15:30:28 +08:00
parent 043f9cbad7
commit 6aa82aeea6
34 changed files with 2030 additions and 862 deletions

View File

@@ -19,7 +19,7 @@ add_library(temp_platform
${CMAKE_SOURCE_DIR}/platform/src/sf_status.cpp)
target_include_directories(temp_platform PUBLIC ${CMAKE_SOURCE_DIR}/common/include)
target_include_directories(temp_platform PUBLIC ${CMAKE_SOURCE_DIR}/platform/include)
target_link_libraries(temp_platform PUBLIC common pthread cjson maatframe MESA_prof_load MESA_field_stat fieldstat4 gmock_marsio)
target_link_libraries(temp_platform PUBLIC common pthread cjson maatframe MESA_prof_load fieldstat4 gmock_marsio)
###############################################################################
# gtest_ctrl_pkt_opening

View File

@@ -79,7 +79,7 @@ inline struct gtest_frame *gtest_frame_new(const char *json_file, const char *de
struct thread_ctx *thread_ctx = NULL;
struct gtest_frame *instance = (struct gtest_frame *)calloc(1, sizeof(struct gtest_frame));
system("rm -rf `ls log/* | egrep -v '(*_ok.fs2)'`");
system("rm -rf `ls log/* | egrep -v '(*_expect.fs4)'`");
memset(&cmdline, 0, sizeof(cmdline));
snprintf(cmdline, sizeof(cmdline), "sed -i \"s/json_cfg_file=.*/json_cfg_file=resource\\/%s/\" ./conf/sce.conf", json_file);
@@ -167,18 +167,15 @@ inline void gtest_frame_log(struct gtest_frame *instance)
struct sce_ctx *sce_ctx = instance->sce_ctx;
struct thread_ctx *thread_ctx = &sce_ctx->work_threads[0];
for (int i = 0; i < 10; i++)
{
global_metrics_update(sce_ctx->metrics, &thread_ctx->thread_metrics, thread_ctx->thread_index);
global_metrics_dump(sce_ctx->metrics);
usleep(1);
}
global_metrics_sync(sce_ctx->metrics, &thread_ctx->thread_metrics, thread_ctx->thread_index);
global_metrics_flush(sce_ctx->metrics);
sleep(2);
memset(&cmdline, 0, sizeof(cmdline));
snprintf(cmdline, sizeof(cmdline), "cp log/sce.fs2 log/test_%s.fs2", instance->desc);
snprintf(cmdline, sizeof(cmdline), "cat log/sce.fs4 | jq >> log/test_%s.fs4", instance->desc);
system(cmdline);
memset(&cmdline, 0, sizeof(cmdline));
snprintf(cmdline, sizeof(cmdline), "diff -I '===' log/test_%s.fs2 log/test_%s_ok.fs2 > log/test_%s.diff", instance->desc, instance->desc, instance->desc);
snprintf(cmdline, sizeof(cmdline), "diff -I 'timestamp_ms' log/test_%s.fs4 log/test_%s_expect.fs4 > log/test_%s.diff", instance->desc, instance->desc, instance->desc);
int ret = system(cmdline);
printf("exec %s, return: %d\n", cmdline, ret);

View File

@@ -57,15 +57,8 @@ dev_endpoint_l3_ip=192.168.100.1
# dev_endpoint_l3_mac=aa:aa:aa:aa:aa:aa
[stat]
output_file=log/sce.fs2
statsd_server=127.0.0.1
statsd_port=8100
# 1 : FS_OUTPUT_STATSD
# 2 : FS_OUTPUT_INFLUX_LINE
statsd_format=1
output_file=log/sce.fs4
statsd_cycle=2
prometheus_listen_port=9001
prometheus_listen_url=/sce_prometheus
[metrics]
output_fs_interval_ms=500

View File

@@ -0,0 +1,155 @@
[
{
"tags": {
"name": "SCE"
},
"fields": {
"dev_nf_rx_P": 1,
"dev_nf_rx_B": 160,
"dev_nf_tx_P": 1,
"dev_nf_tx_B": 160,
"kee_d_rx_P": 0,
"kee_d_rx_B": 0,
"kee_d_tx_P": 0,
"kee_d_tx_B": 0,
"raw_rx_P": 0,
"raw_rx_B": 0,
"raw_tx_P": 0,
"raw_tx_B": 0,
"dec_rx_P": 0,
"dec_rx_B": 0,
"dec_tx_P": 0,
"dec_tx_B": 0,
"dev_l3_rx_P": 0,
"dev_l3_rx_B": 0,
"dev_l3_tx_P": 0,
"dev_l3_tx_B": 0,
"dev_l3_dop_P": 0,
"dev_l3_dop_B": 0,
"kee_u_rx_P": 0,
"kee_u_rx_B": 0,
"kee_u_rxdop_P": 0,
"kee_u_rxdop_B": 0,
"dev_l2_rx_P": 0,
"dev_l2_rx_B": 0,
"dev_l2_tx_P": 0,
"dev_l2_tx_B": 0,
"dev_l2_dop_P": 0,
"dev_l2_dop_B": 0,
"mirr_bypass_P": 0,
"mirr_bypass_B": 0,
"mirr_block_P": 0,
"mirr_block_B": 0,
"mirr_rxdop_P": 0,
"mirr_rxdop_B": 0,
"mirr_tx_P": 0,
"mirr_tx_B": 0,
"stee_bypass_P": 0,
"stee_bypass_B": 0,
"stee_block_P": 0,
"stee_block_B": 0,
"stee_rx_P": 0,
"stee_rx_B": 0,
"stee_tx_P": 0,
"stee_tx_B": 0,
"miss_sess_P": 0,
"miss_sess_B": 0,
"err_bypass_P": 0,
"err_bypass_B": 0,
"err_block_P": 0,
"err_block_B": 0,
"sf_active": 1,
"sf_inactive": 0,
"ctrl_rx_P": 1,
"ctrl_rx_B": 160,
"ctrl_tx_P": 1,
"ctrl_tx_B": 160,
"ctrl_opening": 0,
"ctrl_active": 1,
"ctrl_closing": 0,
"ctrl_resetall": 0,
"ctrl_error": 0,
"curr_sessions": 1,
"session_logs": 0,
"session_new": 1,
"session_free": 0,
"stateless_inject_P": 0,
"stateless_inject_B": 0
},
"fields_delta": {
"dev_nf_rx_P": 1,
"dev_nf_rx_B": 160,
"dev_nf_tx_P": 1,
"dev_nf_tx_B": 160,
"kee_d_rx_P": 0,
"kee_d_rx_B": 0,
"kee_d_tx_P": 0,
"kee_d_tx_B": 0,
"raw_rx_P": 0,
"raw_rx_B": 0,
"raw_tx_P": 0,
"raw_tx_B": 0,
"dec_rx_P": 0,
"dec_rx_B": 0,
"dec_tx_P": 0,
"dec_tx_B": 0,
"dev_l3_rx_P": 0,
"dev_l3_rx_B": 0,
"dev_l3_tx_P": 0,
"dev_l3_tx_B": 0,
"dev_l3_dop_P": 0,
"dev_l3_dop_B": 0,
"kee_u_rx_P": 0,
"kee_u_rx_B": 0,
"kee_u_rxdop_P": 0,
"kee_u_rxdop_B": 0,
"dev_l2_rx_P": 0,
"dev_l2_rx_B": 0,
"dev_l2_tx_P": 0,
"dev_l2_tx_B": 0,
"dev_l2_dop_P": 0,
"dev_l2_dop_B": 0,
"mirr_bypass_P": 0,
"mirr_bypass_B": 0,
"mirr_block_P": 0,
"mirr_block_B": 0,
"mirr_rxdop_P": 0,
"mirr_rxdop_B": 0,
"mirr_tx_P": 0,
"mirr_tx_B": 0,
"stee_bypass_P": 0,
"stee_bypass_B": 0,
"stee_block_P": 0,
"stee_block_B": 0,
"stee_rx_P": 0,
"stee_rx_B": 0,
"stee_tx_P": 0,
"stee_tx_B": 0,
"miss_sess_P": 0,
"miss_sess_B": 0,
"err_bypass_P": 0,
"err_bypass_B": 0,
"err_block_P": 0,
"err_block_B": 0,
"sf_active": 1,
"sf_inactive": 0,
"ctrl_rx_P": 1,
"ctrl_rx_B": 160,
"ctrl_tx_P": 1,
"ctrl_tx_B": 160,
"ctrl_opening": 0,
"ctrl_active": 1,
"ctrl_closing": 0,
"ctrl_resetall": 0,
"ctrl_error": 0,
"curr_sessions": 1,
"session_logs": 0,
"session_new": 1,
"session_free": 0,
"stateless_inject_P": 0,
"stateless_inject_B": 0
},
"timestamp_ms": 1731047893641,
"timestamp_ms_delta": 2004
}
]

View File

@@ -1,29 +0,0 @@
============================================================Sat Mar 2 17:30:56 2024============================================================
dev_nf_rx_P dev_nf_rx_B dev_nf_tx_P dev_nf_tx_B kee_d_rx_P kee_d_rx_B kee_d_tx_P kee_d_tx_B
sum 1 160 1 160 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
raw_rx_P raw_rx_B raw_tx_P raw_tx_B dec_rx_P dec_rx_B dec_tx_P dec_tx_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
dev_l3_rx_P dev_l3_rx_B dev_l3_tx_P dev_l3_tx_B kee_u_rx_P kee_u_rx_B kee_u_rxdop_P kee_u_rxdop_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
dev_l2_rx_P dev_l2_rx_B dev_l2_tx_P dev_l2_tx_B dev_l3_dop_P dev_l3_dop_B dev_l2_dop_P dev_l2_dop_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
mirr_bypass_P mirr_bypass_B mirr_block_P mirr_block_B mirr_rxdop_P mirr_rxdop_B mirr_tx_P mirr_tx_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
stee_bypass_P stee_bypass_B stee_block_P stee_block_B stee_rx_P stee_rx_B stee_tx_P stee_tx_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
miss_sess_P miss_sess_B err_bypass_P err_bypass_B err_block_P err_block_B sf_active sf_inactive
sum 0 0 0 0 0 0 1 0
speed/s 0 0 0 0 0 0 0 0
ctrl_rx_P ctrl_rx_B ctrl_tx_P ctrl_tx_B ctrl_opening ctrl_active ctrl_closing ctrl_resetall
sum 1 160 1 160 0 1 0 0
speed/s 0 0 0 0 0 0 0 0
ctrl_error curr_sessions session_logs session_new session_free stateless_inject_P stateless_inject_B
sum 0 1 0 1 0 0 0
speed/s 0 0 0 0 0 0 0
________________________________________________________________________________________________________________________________________________

View File

@@ -0,0 +1,155 @@
[
{
"tags": {
"name": "SCE"
},
"fields": {
"dev_nf_rx_P": 1,
"dev_nf_rx_B": 99,
"dev_nf_tx_P": 1,
"dev_nf_tx_B": 99,
"kee_d_rx_P": 0,
"kee_d_rx_B": 0,
"kee_d_tx_P": 0,
"kee_d_tx_B": 0,
"raw_rx_P": 0,
"raw_rx_B": 0,
"raw_tx_P": 0,
"raw_tx_B": 0,
"dec_rx_P": 0,
"dec_rx_B": 0,
"dec_tx_P": 0,
"dec_tx_B": 0,
"dev_l3_rx_P": 0,
"dev_l3_rx_B": 0,
"dev_l3_tx_P": 0,
"dev_l3_tx_B": 0,
"dev_l3_dop_P": 0,
"dev_l3_dop_B": 0,
"kee_u_rx_P": 0,
"kee_u_rx_B": 0,
"kee_u_rxdop_P": 0,
"kee_u_rxdop_B": 0,
"dev_l2_rx_P": 0,
"dev_l2_rx_B": 0,
"dev_l2_tx_P": 0,
"dev_l2_tx_B": 0,
"dev_l2_dop_P": 0,
"dev_l2_dop_B": 0,
"mirr_bypass_P": 0,
"mirr_bypass_B": 0,
"mirr_block_P": 0,
"mirr_block_B": 0,
"mirr_rxdop_P": 0,
"mirr_rxdop_B": 0,
"mirr_tx_P": 0,
"mirr_tx_B": 0,
"stee_bypass_P": 0,
"stee_bypass_B": 0,
"stee_block_P": 0,
"stee_block_B": 0,
"stee_rx_P": 0,
"stee_rx_B": 0,
"stee_tx_P": 0,
"stee_tx_B": 0,
"miss_sess_P": 0,
"miss_sess_B": 0,
"err_bypass_P": 0,
"err_bypass_B": 0,
"err_block_P": 0,
"err_block_B": 0,
"sf_active": 0,
"sf_inactive": 0,
"ctrl_rx_P": 1,
"ctrl_rx_B": 99,
"ctrl_tx_P": 1,
"ctrl_tx_B": 99,
"ctrl_opening": 1,
"ctrl_active": 0,
"ctrl_closing": 0,
"ctrl_resetall": 0,
"ctrl_error": 0,
"curr_sessions": 0,
"session_logs": 0,
"session_new": 0,
"session_free": 0,
"stateless_inject_P": 0,
"stateless_inject_B": 0
},
"fields_delta": {
"dev_nf_rx_P": 1,
"dev_nf_rx_B": 99,
"dev_nf_tx_P": 1,
"dev_nf_tx_B": 99,
"kee_d_rx_P": 0,
"kee_d_rx_B": 0,
"kee_d_tx_P": 0,
"kee_d_tx_B": 0,
"raw_rx_P": 0,
"raw_rx_B": 0,
"raw_tx_P": 0,
"raw_tx_B": 0,
"dec_rx_P": 0,
"dec_rx_B": 0,
"dec_tx_P": 0,
"dec_tx_B": 0,
"dev_l3_rx_P": 0,
"dev_l3_rx_B": 0,
"dev_l3_tx_P": 0,
"dev_l3_tx_B": 0,
"dev_l3_dop_P": 0,
"dev_l3_dop_B": 0,
"kee_u_rx_P": 0,
"kee_u_rx_B": 0,
"kee_u_rxdop_P": 0,
"kee_u_rxdop_B": 0,
"dev_l2_rx_P": 0,
"dev_l2_rx_B": 0,
"dev_l2_tx_P": 0,
"dev_l2_tx_B": 0,
"dev_l2_dop_P": 0,
"dev_l2_dop_B": 0,
"mirr_bypass_P": 0,
"mirr_bypass_B": 0,
"mirr_block_P": 0,
"mirr_block_B": 0,
"mirr_rxdop_P": 0,
"mirr_rxdop_B": 0,
"mirr_tx_P": 0,
"mirr_tx_B": 0,
"stee_bypass_P": 0,
"stee_bypass_B": 0,
"stee_block_P": 0,
"stee_block_B": 0,
"stee_rx_P": 0,
"stee_rx_B": 0,
"stee_tx_P": 0,
"stee_tx_B": 0,
"miss_sess_P": 0,
"miss_sess_B": 0,
"err_bypass_P": 0,
"err_bypass_B": 0,
"err_block_P": 0,
"err_block_B": 0,
"sf_active": 0,
"sf_inactive": 0,
"ctrl_rx_P": 1,
"ctrl_rx_B": 99,
"ctrl_tx_P": 1,
"ctrl_tx_B": 99,
"ctrl_opening": 1,
"ctrl_active": 0,
"ctrl_closing": 0,
"ctrl_resetall": 0,
"ctrl_error": 0,
"curr_sessions": 0,
"session_logs": 0,
"session_new": 0,
"session_free": 0,
"stateless_inject_P": 0,
"stateless_inject_B": 0
},
"timestamp_ms": 1731047780055,
"timestamp_ms_delta": 2004
}
]

View File

@@ -1,29 +0,0 @@
============================================================Sat Mar 2 17:29:46 2024============================================================
dev_nf_rx_P dev_nf_rx_B dev_nf_tx_P dev_nf_tx_B kee_d_rx_P kee_d_rx_B kee_d_tx_P kee_d_tx_B
sum 1 99 1 99 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
raw_rx_P raw_rx_B raw_tx_P raw_tx_B dec_rx_P dec_rx_B dec_tx_P dec_tx_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
dev_l3_rx_P dev_l3_rx_B dev_l3_tx_P dev_l3_tx_B kee_u_rx_P kee_u_rx_B kee_u_rxdop_P kee_u_rxdop_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
dev_l2_rx_P dev_l2_rx_B dev_l2_tx_P dev_l2_tx_B dev_l3_dop_P dev_l3_dop_B dev_l2_dop_P dev_l2_dop_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
mirr_bypass_P mirr_bypass_B mirr_block_P mirr_block_B mirr_rxdop_P mirr_rxdop_B mirr_tx_P mirr_tx_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
stee_bypass_P stee_bypass_B stee_block_P stee_block_B stee_rx_P stee_rx_B stee_tx_P stee_tx_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
miss_sess_P miss_sess_B err_bypass_P err_bypass_B err_block_P err_block_B sf_active sf_inactive
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
ctrl_rx_P ctrl_rx_B ctrl_tx_P ctrl_tx_B ctrl_opening ctrl_active ctrl_closing ctrl_resetall
sum 1 99 1 99 1 0 0 0
speed/s 0 0 0 0 0 0 0 0
ctrl_error curr_sessions session_logs session_new session_free stateless_inject_P stateless_inject_B
sum 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0
________________________________________________________________________________________________________________________________________________

View File

@@ -0,0 +1,155 @@
[
{
"tags": {
"name": "SCE"
},
"fields": {
"dev_nf_rx_P": 1,
"dev_nf_rx_B": 145,
"dev_nf_tx_P": 1,
"dev_nf_tx_B": 145,
"kee_d_rx_P": 0,
"kee_d_rx_B": 0,
"kee_d_tx_P": 0,
"kee_d_tx_B": 0,
"raw_rx_P": 1,
"raw_rx_B": 145,
"raw_tx_P": 1,
"raw_tx_B": 145,
"dec_rx_P": 0,
"dec_rx_B": 0,
"dec_tx_P": 0,
"dec_tx_B": 0,
"dev_l3_rx_P": 0,
"dev_l3_rx_B": 0,
"dev_l3_tx_P": 0,
"dev_l3_tx_B": 0,
"dev_l3_dop_P": 0,
"dev_l3_dop_B": 0,
"kee_u_rx_P": 0,
"kee_u_rx_B": 0,
"kee_u_rxdop_P": 0,
"kee_u_rxdop_B": 0,
"dev_l2_rx_P": 0,
"dev_l2_rx_B": 0,
"dev_l2_tx_P": 0,
"dev_l2_tx_B": 0,
"dev_l2_dop_P": 0,
"dev_l2_dop_B": 0,
"mirr_bypass_P": 0,
"mirr_bypass_B": 0,
"mirr_block_P": 0,
"mirr_block_B": 0,
"mirr_rxdop_P": 0,
"mirr_rxdop_B": 0,
"mirr_tx_P": 0,
"mirr_tx_B": 0,
"stee_bypass_P": 0,
"stee_bypass_B": 0,
"stee_block_P": 0,
"stee_block_B": 0,
"stee_rx_P": 0,
"stee_rx_B": 0,
"stee_tx_P": 0,
"stee_tx_B": 0,
"miss_sess_P": 1,
"miss_sess_B": 145,
"err_bypass_P": 1,
"err_bypass_B": 145,
"err_block_P": 0,
"err_block_B": 0,
"sf_active": 0,
"sf_inactive": 0,
"ctrl_rx_P": 0,
"ctrl_rx_B": 0,
"ctrl_tx_P": 0,
"ctrl_tx_B": 0,
"ctrl_opening": 0,
"ctrl_active": 0,
"ctrl_closing": 0,
"ctrl_resetall": 0,
"ctrl_error": 0,
"curr_sessions": 0,
"session_logs": 0,
"session_new": 0,
"session_free": 0,
"stateless_inject_P": 0,
"stateless_inject_B": 0
},
"fields_delta": {
"dev_nf_rx_P": 1,
"dev_nf_rx_B": 145,
"dev_nf_tx_P": 1,
"dev_nf_tx_B": 145,
"kee_d_rx_P": 0,
"kee_d_rx_B": 0,
"kee_d_tx_P": 0,
"kee_d_tx_B": 0,
"raw_rx_P": 1,
"raw_rx_B": 145,
"raw_tx_P": 1,
"raw_tx_B": 145,
"dec_rx_P": 0,
"dec_rx_B": 0,
"dec_tx_P": 0,
"dec_tx_B": 0,
"dev_l3_rx_P": 0,
"dev_l3_rx_B": 0,
"dev_l3_tx_P": 0,
"dev_l3_tx_B": 0,
"dev_l3_dop_P": 0,
"dev_l3_dop_B": 0,
"kee_u_rx_P": 0,
"kee_u_rx_B": 0,
"kee_u_rxdop_P": 0,
"kee_u_rxdop_B": 0,
"dev_l2_rx_P": 0,
"dev_l2_rx_B": 0,
"dev_l2_tx_P": 0,
"dev_l2_tx_B": 0,
"dev_l2_dop_P": 0,
"dev_l2_dop_B": 0,
"mirr_bypass_P": 0,
"mirr_bypass_B": 0,
"mirr_block_P": 0,
"mirr_block_B": 0,
"mirr_rxdop_P": 0,
"mirr_rxdop_B": 0,
"mirr_tx_P": 0,
"mirr_tx_B": 0,
"stee_bypass_P": 0,
"stee_bypass_B": 0,
"stee_block_P": 0,
"stee_block_B": 0,
"stee_rx_P": 0,
"stee_rx_B": 0,
"stee_tx_P": 0,
"stee_tx_B": 0,
"miss_sess_P": 1,
"miss_sess_B": 145,
"err_bypass_P": 1,
"err_bypass_B": 145,
"err_block_P": 0,
"err_block_B": 0,
"sf_active": 0,
"sf_inactive": 0,
"ctrl_rx_P": 0,
"ctrl_rx_B": 0,
"ctrl_tx_P": 0,
"ctrl_tx_B": 0,
"ctrl_opening": 0,
"ctrl_active": 0,
"ctrl_closing": 0,
"ctrl_resetall": 0,
"ctrl_error": 0,
"curr_sessions": 0,
"session_logs": 0,
"session_new": 0,
"session_free": 0,
"stateless_inject_P": 0,
"stateless_inject_B": 0
},
"timestamp_ms": 1731047928185,
"timestamp_ms_delta": 2004
}
]

View File

@@ -1,29 +0,0 @@
============================================================Sat Mar 2 17:36:37 2024============================================================
dev_nf_rx_P dev_nf_rx_B dev_nf_tx_P dev_nf_tx_B kee_d_rx_P kee_d_rx_B kee_d_tx_P kee_d_tx_B
sum 1 145 1 145 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
raw_rx_P raw_rx_B raw_tx_P raw_tx_B dec_rx_P dec_rx_B dec_tx_P dec_tx_B
sum 1 145 1 145 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
dev_l3_rx_P dev_l3_rx_B dev_l3_tx_P dev_l3_tx_B kee_u_rx_P kee_u_rx_B kee_u_rxdop_P kee_u_rxdop_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
dev_l2_rx_P dev_l2_rx_B dev_l2_tx_P dev_l2_tx_B dev_l3_dop_P dev_l3_dop_B dev_l2_dop_P dev_l2_dop_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
mirr_bypass_P mirr_bypass_B mirr_block_P mirr_block_B mirr_rxdop_P mirr_rxdop_B mirr_tx_P mirr_tx_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
stee_bypass_P stee_bypass_B stee_block_P stee_block_B stee_rx_P stee_rx_B stee_tx_P stee_tx_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
miss_sess_P miss_sess_B err_bypass_P err_bypass_B err_block_P err_block_B sf_active sf_inactive
sum 1 145 1 145 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
ctrl_rx_P ctrl_rx_B ctrl_tx_P ctrl_tx_B ctrl_opening ctrl_active ctrl_closing ctrl_resetall
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
ctrl_error curr_sessions session_logs session_new session_free stateless_inject_P stateless_inject_B
sum 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0
________________________________________________________________________________________________________________________________________________

View File

@@ -0,0 +1,155 @@
[
{
"tags": {
"name": "SCE"
},
"fields": {
"dev_nf_rx_P": 2,
"dev_nf_rx_B": 305,
"dev_nf_tx_P": 2,
"dev_nf_tx_B": 305,
"kee_d_rx_P": 0,
"kee_d_rx_B": 0,
"kee_d_tx_P": 0,
"kee_d_tx_B": 0,
"raw_rx_P": 1,
"raw_rx_B": 145,
"raw_tx_P": 1,
"raw_tx_B": 145,
"dec_rx_P": 0,
"dec_rx_B": 0,
"dec_tx_P": 0,
"dec_tx_B": 0,
"dev_l3_rx_P": 0,
"dev_l3_rx_B": 0,
"dev_l3_tx_P": 0,
"dev_l3_tx_B": 0,
"dev_l3_dop_P": 0,
"dev_l3_dop_B": 0,
"kee_u_rx_P": 0,
"kee_u_rx_B": 0,
"kee_u_rxdop_P": 0,
"kee_u_rxdop_B": 0,
"dev_l2_rx_P": 0,
"dev_l2_rx_B": 0,
"dev_l2_tx_P": 0,
"dev_l2_tx_B": 0,
"dev_l2_dop_P": 0,
"dev_l2_dop_B": 0,
"mirr_bypass_P": 0,
"mirr_bypass_B": 0,
"mirr_block_P": 1,
"mirr_block_B": 145,
"mirr_rxdop_P": 0,
"mirr_rxdop_B": 0,
"mirr_tx_P": 0,
"mirr_tx_B": 0,
"stee_bypass_P": 0,
"stee_bypass_B": 0,
"stee_block_P": 0,
"stee_block_B": 0,
"stee_rx_P": 0,
"stee_rx_B": 0,
"stee_tx_P": 0,
"stee_tx_B": 0,
"miss_sess_P": 0,
"miss_sess_B": 0,
"err_bypass_P": 0,
"err_bypass_B": 0,
"err_block_P": 0,
"err_block_B": 0,
"sf_active": 0,
"sf_inactive": 0,
"ctrl_rx_P": 1,
"ctrl_rx_B": 160,
"ctrl_tx_P": 1,
"ctrl_tx_B": 160,
"ctrl_opening": 0,
"ctrl_active": 1,
"ctrl_closing": 0,
"ctrl_resetall": 0,
"ctrl_error": 0,
"curr_sessions": 1,
"session_logs": 0,
"session_new": 1,
"session_free": 0,
"stateless_inject_P": 0,
"stateless_inject_B": 0
},
"fields_delta": {
"dev_nf_rx_P": 2,
"dev_nf_rx_B": 305,
"dev_nf_tx_P": 2,
"dev_nf_tx_B": 305,
"kee_d_rx_P": 0,
"kee_d_rx_B": 0,
"kee_d_tx_P": 0,
"kee_d_tx_B": 0,
"raw_rx_P": 1,
"raw_rx_B": 145,
"raw_tx_P": 1,
"raw_tx_B": 145,
"dec_rx_P": 0,
"dec_rx_B": 0,
"dec_tx_P": 0,
"dec_tx_B": 0,
"dev_l3_rx_P": 0,
"dev_l3_rx_B": 0,
"dev_l3_tx_P": 0,
"dev_l3_tx_B": 0,
"dev_l3_dop_P": 0,
"dev_l3_dop_B": 0,
"kee_u_rx_P": 0,
"kee_u_rx_B": 0,
"kee_u_rxdop_P": 0,
"kee_u_rxdop_B": 0,
"dev_l2_rx_P": 0,
"dev_l2_rx_B": 0,
"dev_l2_tx_P": 0,
"dev_l2_tx_B": 0,
"dev_l2_dop_P": 0,
"dev_l2_dop_B": 0,
"mirr_bypass_P": 0,
"mirr_bypass_B": 0,
"mirr_block_P": 1,
"mirr_block_B": 145,
"mirr_rxdop_P": 0,
"mirr_rxdop_B": 0,
"mirr_tx_P": 0,
"mirr_tx_B": 0,
"stee_bypass_P": 0,
"stee_bypass_B": 0,
"stee_block_P": 0,
"stee_block_B": 0,
"stee_rx_P": 0,
"stee_rx_B": 0,
"stee_tx_P": 0,
"stee_tx_B": 0,
"miss_sess_P": 0,
"miss_sess_B": 0,
"err_bypass_P": 0,
"err_bypass_B": 0,
"err_block_P": 0,
"err_block_B": 0,
"sf_active": 0,
"sf_inactive": 0,
"ctrl_rx_P": 1,
"ctrl_rx_B": 160,
"ctrl_tx_P": 1,
"ctrl_tx_B": 160,
"ctrl_opening": 0,
"ctrl_active": 1,
"ctrl_closing": 0,
"ctrl_resetall": 0,
"ctrl_error": 0,
"curr_sessions": 1,
"session_logs": 0,
"session_new": 1,
"session_free": 0,
"stateless_inject_P": 0,
"stateless_inject_B": 0
},
"timestamp_ms": 1731049123838,
"timestamp_ms_delta": 2005
}
]

View File

@@ -1,29 +0,0 @@
============================================================Sat Mar 2 17:34:59 2024============================================================
dev_nf_rx_P dev_nf_rx_B dev_nf_tx_P dev_nf_tx_B kee_d_rx_P kee_d_rx_B kee_d_tx_P kee_d_tx_B
sum 2 305 2 305 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
raw_rx_P raw_rx_B raw_tx_P raw_tx_B dec_rx_P dec_rx_B dec_tx_P dec_tx_B
sum 1 145 1 145 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
dev_l3_rx_P dev_l3_rx_B dev_l3_tx_P dev_l3_tx_B kee_u_rx_P kee_u_rx_B kee_u_rxdop_P kee_u_rxdop_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
dev_l2_rx_P dev_l2_rx_B dev_l2_tx_P dev_l2_tx_B dev_l3_dop_P dev_l3_dop_B dev_l2_dop_P dev_l2_dop_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
mirr_bypass_P mirr_bypass_B mirr_block_P mirr_block_B mirr_rxdop_P mirr_rxdop_B mirr_tx_P mirr_tx_B
sum 0 0 1 145 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
stee_bypass_P stee_bypass_B stee_block_P stee_block_B stee_rx_P stee_rx_B stee_tx_P stee_tx_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
miss_sess_P miss_sess_B err_bypass_P err_bypass_B err_block_P err_block_B sf_active sf_inactive
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
ctrl_rx_P ctrl_rx_B ctrl_tx_P ctrl_tx_B ctrl_opening ctrl_active ctrl_closing ctrl_resetall
sum 1 160 1 160 0 1 0 0
speed/s 0 0 0 0 0 0 0 0
ctrl_error curr_sessions session_logs session_new session_free stateless_inject_P stateless_inject_B
sum 0 1 0 1 0 0 0
speed/s 0 0 0 0 0 0 0
________________________________________________________________________________________________________________________________________________

View File

@@ -0,0 +1,155 @@
[
{
"tags": {
"name": "SCE"
},
"fields": {
"dev_nf_rx_P": 2,
"dev_nf_rx_B": 305,
"dev_nf_tx_P": 2,
"dev_nf_tx_B": 305,
"kee_d_rx_P": 0,
"kee_d_rx_B": 0,
"kee_d_tx_P": 0,
"kee_d_tx_B": 0,
"raw_rx_P": 1,
"raw_rx_B": 145,
"raw_tx_P": 1,
"raw_tx_B": 145,
"dec_rx_P": 0,
"dec_rx_B": 0,
"dec_tx_P": 0,
"dec_tx_B": 0,
"dev_l3_rx_P": 0,
"dev_l3_rx_B": 0,
"dev_l3_tx_P": 0,
"dev_l3_tx_B": 0,
"dev_l3_dop_P": 0,
"dev_l3_dop_B": 0,
"kee_u_rx_P": 0,
"kee_u_rx_B": 0,
"kee_u_rxdop_P": 0,
"kee_u_rxdop_B": 0,
"dev_l2_rx_P": 0,
"dev_l2_rx_B": 0,
"dev_l2_tx_P": 0,
"dev_l2_tx_B": 0,
"dev_l2_dop_P": 0,
"dev_l2_dop_B": 0,
"mirr_bypass_P": 1,
"mirr_bypass_B": 145,
"mirr_block_P": 0,
"mirr_block_B": 0,
"mirr_rxdop_P": 0,
"mirr_rxdop_B": 0,
"mirr_tx_P": 0,
"mirr_tx_B": 0,
"stee_bypass_P": 0,
"stee_bypass_B": 0,
"stee_block_P": 0,
"stee_block_B": 0,
"stee_rx_P": 0,
"stee_rx_B": 0,
"stee_tx_P": 0,
"stee_tx_B": 0,
"miss_sess_P": 0,
"miss_sess_B": 0,
"err_bypass_P": 0,
"err_bypass_B": 0,
"err_block_P": 0,
"err_block_B": 0,
"sf_active": 0,
"sf_inactive": 0,
"ctrl_rx_P": 1,
"ctrl_rx_B": 160,
"ctrl_tx_P": 1,
"ctrl_tx_B": 160,
"ctrl_opening": 0,
"ctrl_active": 1,
"ctrl_closing": 0,
"ctrl_resetall": 0,
"ctrl_error": 0,
"curr_sessions": 1,
"session_logs": 0,
"session_new": 1,
"session_free": 0,
"stateless_inject_P": 0,
"stateless_inject_B": 0
},
"fields_delta": {
"dev_nf_rx_P": 2,
"dev_nf_rx_B": 305,
"dev_nf_tx_P": 2,
"dev_nf_tx_B": 305,
"kee_d_rx_P": 0,
"kee_d_rx_B": 0,
"kee_d_tx_P": 0,
"kee_d_tx_B": 0,
"raw_rx_P": 1,
"raw_rx_B": 145,
"raw_tx_P": 1,
"raw_tx_B": 145,
"dec_rx_P": 0,
"dec_rx_B": 0,
"dec_tx_P": 0,
"dec_tx_B": 0,
"dev_l3_rx_P": 0,
"dev_l3_rx_B": 0,
"dev_l3_tx_P": 0,
"dev_l3_tx_B": 0,
"dev_l3_dop_P": 0,
"dev_l3_dop_B": 0,
"kee_u_rx_P": 0,
"kee_u_rx_B": 0,
"kee_u_rxdop_P": 0,
"kee_u_rxdop_B": 0,
"dev_l2_rx_P": 0,
"dev_l2_rx_B": 0,
"dev_l2_tx_P": 0,
"dev_l2_tx_B": 0,
"dev_l2_dop_P": 0,
"dev_l2_dop_B": 0,
"mirr_bypass_P": 1,
"mirr_bypass_B": 145,
"mirr_block_P": 0,
"mirr_block_B": 0,
"mirr_rxdop_P": 0,
"mirr_rxdop_B": 0,
"mirr_tx_P": 0,
"mirr_tx_B": 0,
"stee_bypass_P": 0,
"stee_bypass_B": 0,
"stee_block_P": 0,
"stee_block_B": 0,
"stee_rx_P": 0,
"stee_rx_B": 0,
"stee_tx_P": 0,
"stee_tx_B": 0,
"miss_sess_P": 0,
"miss_sess_B": 0,
"err_bypass_P": 0,
"err_bypass_B": 0,
"err_block_P": 0,
"err_block_B": 0,
"sf_active": 0,
"sf_inactive": 0,
"ctrl_rx_P": 1,
"ctrl_rx_B": 160,
"ctrl_tx_P": 1,
"ctrl_tx_B": 160,
"ctrl_opening": 0,
"ctrl_active": 1,
"ctrl_closing": 0,
"ctrl_resetall": 0,
"ctrl_error": 0,
"curr_sessions": 1,
"session_logs": 0,
"session_new": 1,
"session_free": 0,
"stateless_inject_P": 0,
"stateless_inject_B": 0
},
"timestamp_ms": 1731049107065,
"timestamp_ms_delta": 2004
}
]

View File

@@ -1,29 +0,0 @@
============================================================Sat Mar 2 17:34:24 2024============================================================
dev_nf_rx_P dev_nf_rx_B dev_nf_tx_P dev_nf_tx_B kee_d_rx_P kee_d_rx_B kee_d_tx_P kee_d_tx_B
sum 2 305 2 305 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
raw_rx_P raw_rx_B raw_tx_P raw_tx_B dec_rx_P dec_rx_B dec_tx_P dec_tx_B
sum 1 145 1 145 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
dev_l3_rx_P dev_l3_rx_B dev_l3_tx_P dev_l3_tx_B kee_u_rx_P kee_u_rx_B kee_u_rxdop_P kee_u_rxdop_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
dev_l2_rx_P dev_l2_rx_B dev_l2_tx_P dev_l2_tx_B dev_l3_dop_P dev_l3_dop_B dev_l2_dop_P dev_l2_dop_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
mirr_bypass_P mirr_bypass_B mirr_block_P mirr_block_B mirr_rxdop_P mirr_rxdop_B mirr_tx_P mirr_tx_B
sum 1 145 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
stee_bypass_P stee_bypass_B stee_block_P stee_block_B stee_rx_P stee_rx_B stee_tx_P stee_tx_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
miss_sess_P miss_sess_B err_bypass_P err_bypass_B err_block_P err_block_B sf_active sf_inactive
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
ctrl_rx_P ctrl_rx_B ctrl_tx_P ctrl_tx_B ctrl_opening ctrl_active ctrl_closing ctrl_resetall
sum 1 160 1 160 0 1 0 0
speed/s 0 0 0 0 0 0 0 0
ctrl_error curr_sessions session_logs session_new session_free stateless_inject_P stateless_inject_B
sum 0 1 0 1 0 0 0
speed/s 0 0 0 0 0 0 0
________________________________________________________________________________________________________________________________________________

View File

@@ -0,0 +1,155 @@
[
{
"tags": {
"name": "SCE"
},
"fields": {
"dev_nf_rx_P": 2,
"dev_nf_rx_B": 305,
"dev_nf_tx_P": 2,
"dev_nf_tx_B": 305,
"kee_d_rx_P": 0,
"kee_d_rx_B": 0,
"kee_d_tx_P": 0,
"kee_d_tx_B": 0,
"raw_rx_P": 1,
"raw_rx_B": 145,
"raw_tx_P": 1,
"raw_tx_B": 145,
"dec_rx_P": 0,
"dec_rx_B": 0,
"dec_tx_P": 0,
"dec_tx_B": 0,
"dev_l3_rx_P": 0,
"dev_l3_rx_B": 0,
"dev_l3_tx_P": 1,
"dev_l3_tx_B": 195,
"dev_l3_dop_P": 0,
"dev_l3_dop_B": 0,
"kee_u_rx_P": 0,
"kee_u_rx_B": 0,
"kee_u_rxdop_P": 0,
"kee_u_rxdop_B": 0,
"dev_l2_rx_P": 0,
"dev_l2_rx_B": 0,
"dev_l2_tx_P": 0,
"dev_l2_tx_B": 0,
"dev_l2_dop_P": 0,
"dev_l2_dop_B": 0,
"mirr_bypass_P": 0,
"mirr_bypass_B": 0,
"mirr_block_P": 0,
"mirr_block_B": 0,
"mirr_rxdop_P": 0,
"mirr_rxdop_B": 0,
"mirr_tx_P": 1,
"mirr_tx_B": 145,
"stee_bypass_P": 0,
"stee_bypass_B": 0,
"stee_block_P": 0,
"stee_block_B": 0,
"stee_rx_P": 0,
"stee_rx_B": 0,
"stee_tx_P": 0,
"stee_tx_B": 0,
"miss_sess_P": 0,
"miss_sess_B": 0,
"err_bypass_P": 0,
"err_bypass_B": 0,
"err_block_P": 0,
"err_block_B": 0,
"sf_active": 1,
"sf_inactive": 0,
"ctrl_rx_P": 1,
"ctrl_rx_B": 160,
"ctrl_tx_P": 1,
"ctrl_tx_B": 160,
"ctrl_opening": 0,
"ctrl_active": 1,
"ctrl_closing": 0,
"ctrl_resetall": 0,
"ctrl_error": 0,
"curr_sessions": 1,
"session_logs": 0,
"session_new": 1,
"session_free": 0,
"stateless_inject_P": 0,
"stateless_inject_B": 0
},
"fields_delta": {
"dev_nf_rx_P": 2,
"dev_nf_rx_B": 305,
"dev_nf_tx_P": 2,
"dev_nf_tx_B": 305,
"kee_d_rx_P": 0,
"kee_d_rx_B": 0,
"kee_d_tx_P": 0,
"kee_d_tx_B": 0,
"raw_rx_P": 1,
"raw_rx_B": 145,
"raw_tx_P": 1,
"raw_tx_B": 145,
"dec_rx_P": 0,
"dec_rx_B": 0,
"dec_tx_P": 0,
"dec_tx_B": 0,
"dev_l3_rx_P": 0,
"dev_l3_rx_B": 0,
"dev_l3_tx_P": 1,
"dev_l3_tx_B": 195,
"dev_l3_dop_P": 0,
"dev_l3_dop_B": 0,
"kee_u_rx_P": 0,
"kee_u_rx_B": 0,
"kee_u_rxdop_P": 0,
"kee_u_rxdop_B": 0,
"dev_l2_rx_P": 0,
"dev_l2_rx_B": 0,
"dev_l2_tx_P": 0,
"dev_l2_tx_B": 0,
"dev_l2_dop_P": 0,
"dev_l2_dop_B": 0,
"mirr_bypass_P": 0,
"mirr_bypass_B": 0,
"mirr_block_P": 0,
"mirr_block_B": 0,
"mirr_rxdop_P": 0,
"mirr_rxdop_B": 0,
"mirr_tx_P": 1,
"mirr_tx_B": 145,
"stee_bypass_P": 0,
"stee_bypass_B": 0,
"stee_block_P": 0,
"stee_block_B": 0,
"stee_rx_P": 0,
"stee_rx_B": 0,
"stee_tx_P": 0,
"stee_tx_B": 0,
"miss_sess_P": 0,
"miss_sess_B": 0,
"err_bypass_P": 0,
"err_bypass_B": 0,
"err_block_P": 0,
"err_block_B": 0,
"sf_active": 1,
"sf_inactive": 0,
"ctrl_rx_P": 1,
"ctrl_rx_B": 160,
"ctrl_tx_P": 1,
"ctrl_tx_B": 160,
"ctrl_opening": 0,
"ctrl_active": 1,
"ctrl_closing": 0,
"ctrl_resetall": 0,
"ctrl_error": 0,
"curr_sessions": 1,
"session_logs": 0,
"session_new": 1,
"session_free": 0,
"stateless_inject_P": 0,
"stateless_inject_B": 0
},
"timestamp_ms": 1731049138746,
"timestamp_ms_delta": 2004
}
]

View File

@@ -1,29 +0,0 @@
============================================================Sat Mar 2 17:35:26 2024============================================================
dev_nf_rx_P dev_nf_rx_B dev_nf_tx_P dev_nf_tx_B kee_d_rx_P kee_d_rx_B kee_d_tx_P kee_d_tx_B
sum 2 305 2 305 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
raw_rx_P raw_rx_B raw_tx_P raw_tx_B dec_rx_P dec_rx_B dec_tx_P dec_tx_B
sum 1 145 1 145 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
dev_l3_rx_P dev_l3_rx_B dev_l3_tx_P dev_l3_tx_B kee_u_rx_P kee_u_rx_B kee_u_rxdop_P kee_u_rxdop_B
sum 0 0 1 195 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
dev_l2_rx_P dev_l2_rx_B dev_l2_tx_P dev_l2_tx_B dev_l3_dop_P dev_l3_dop_B dev_l2_dop_P dev_l2_dop_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
mirr_bypass_P mirr_bypass_B mirr_block_P mirr_block_B mirr_rxdop_P mirr_rxdop_B mirr_tx_P mirr_tx_B
sum 0 0 0 0 0 0 1 145
speed/s 0 0 0 0 0 0 0 0
stee_bypass_P stee_bypass_B stee_block_P stee_block_B stee_rx_P stee_rx_B stee_tx_P stee_tx_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
miss_sess_P miss_sess_B err_bypass_P err_bypass_B err_block_P err_block_B sf_active sf_inactive
sum 0 0 0 0 0 0 1 0
speed/s 0 0 0 0 0 0 0 0
ctrl_rx_P ctrl_rx_B ctrl_tx_P ctrl_tx_B ctrl_opening ctrl_active ctrl_closing ctrl_resetall
sum 1 160 1 160 0 1 0 0
speed/s 0 0 0 0 0 0 0 0
ctrl_error curr_sessions session_logs session_new session_free stateless_inject_P stateless_inject_B
sum 0 1 0 1 0 0 0
speed/s 0 0 0 0 0 0 0
________________________________________________________________________________________________________________________________________________

View File

@@ -0,0 +1,155 @@
[
{
"tags": {
"name": "SCE"
},
"fields": {
"dev_nf_rx_P": 2,
"dev_nf_rx_B": 305,
"dev_nf_tx_P": 2,
"dev_nf_tx_B": 305,
"kee_d_rx_P": 0,
"kee_d_rx_B": 0,
"kee_d_tx_P": 0,
"kee_d_tx_B": 0,
"raw_rx_P": 1,
"raw_rx_B": 145,
"raw_tx_P": 1,
"raw_tx_B": 145,
"dec_rx_P": 0,
"dec_rx_B": 0,
"dec_tx_P": 0,
"dec_tx_B": 0,
"dev_l3_rx_P": 1,
"dev_l3_rx_B": 195,
"dev_l3_tx_P": 1,
"dev_l3_tx_B": 195,
"dev_l3_dop_P": 1,
"dev_l3_dop_B": 195,
"kee_u_rx_P": 0,
"kee_u_rx_B": 0,
"kee_u_rxdop_P": 0,
"kee_u_rxdop_B": 0,
"dev_l2_rx_P": 0,
"dev_l2_rx_B": 0,
"dev_l2_tx_P": 0,
"dev_l2_tx_B": 0,
"dev_l2_dop_P": 0,
"dev_l2_dop_B": 0,
"mirr_bypass_P": 0,
"mirr_bypass_B": 0,
"mirr_block_P": 0,
"mirr_block_B": 0,
"mirr_rxdop_P": 1,
"mirr_rxdop_B": 145,
"mirr_tx_P": 1,
"mirr_tx_B": 145,
"stee_bypass_P": 0,
"stee_bypass_B": 0,
"stee_block_P": 0,
"stee_block_B": 0,
"stee_rx_P": 0,
"stee_rx_B": 0,
"stee_tx_P": 0,
"stee_tx_B": 0,
"miss_sess_P": 0,
"miss_sess_B": 0,
"err_bypass_P": 0,
"err_bypass_B": 0,
"err_block_P": 1,
"err_block_B": 145,
"sf_active": 1,
"sf_inactive": 0,
"ctrl_rx_P": 1,
"ctrl_rx_B": 160,
"ctrl_tx_P": 1,
"ctrl_tx_B": 160,
"ctrl_opening": 0,
"ctrl_active": 1,
"ctrl_closing": 0,
"ctrl_resetall": 0,
"ctrl_error": 0,
"curr_sessions": 1,
"session_logs": 0,
"session_new": 1,
"session_free": 0,
"stateless_inject_P": 0,
"stateless_inject_B": 0
},
"fields_delta": {
"dev_nf_rx_P": 2,
"dev_nf_rx_B": 305,
"dev_nf_tx_P": 2,
"dev_nf_tx_B": 305,
"kee_d_rx_P": 0,
"kee_d_rx_B": 0,
"kee_d_tx_P": 0,
"kee_d_tx_B": 0,
"raw_rx_P": 1,
"raw_rx_B": 145,
"raw_tx_P": 1,
"raw_tx_B": 145,
"dec_rx_P": 0,
"dec_rx_B": 0,
"dec_tx_P": 0,
"dec_tx_B": 0,
"dev_l3_rx_P": 1,
"dev_l3_rx_B": 195,
"dev_l3_tx_P": 1,
"dev_l3_tx_B": 195,
"dev_l3_dop_P": 1,
"dev_l3_dop_B": 195,
"kee_u_rx_P": 0,
"kee_u_rx_B": 0,
"kee_u_rxdop_P": 0,
"kee_u_rxdop_B": 0,
"dev_l2_rx_P": 0,
"dev_l2_rx_B": 0,
"dev_l2_tx_P": 0,
"dev_l2_tx_B": 0,
"dev_l2_dop_P": 0,
"dev_l2_dop_B": 0,
"mirr_bypass_P": 0,
"mirr_bypass_B": 0,
"mirr_block_P": 0,
"mirr_block_B": 0,
"mirr_rxdop_P": 1,
"mirr_rxdop_B": 145,
"mirr_tx_P": 1,
"mirr_tx_B": 145,
"stee_bypass_P": 0,
"stee_bypass_B": 0,
"stee_block_P": 0,
"stee_block_B": 0,
"stee_rx_P": 0,
"stee_rx_B": 0,
"stee_tx_P": 0,
"stee_tx_B": 0,
"miss_sess_P": 0,
"miss_sess_B": 0,
"err_bypass_P": 0,
"err_bypass_B": 0,
"err_block_P": 1,
"err_block_B": 145,
"sf_active": 1,
"sf_inactive": 0,
"ctrl_rx_P": 1,
"ctrl_rx_B": 160,
"ctrl_tx_P": 1,
"ctrl_tx_B": 160,
"ctrl_opening": 0,
"ctrl_active": 1,
"ctrl_closing": 0,
"ctrl_resetall": 0,
"ctrl_error": 0,
"curr_sessions": 1,
"session_logs": 0,
"session_new": 1,
"session_free": 0,
"stateless_inject_P": 0,
"stateless_inject_B": 0
},
"timestamp_ms": 1731049155805,
"timestamp_ms_delta": 2004
}
]

View File

@@ -1,29 +0,0 @@
============================================================Sat Mar 2 17:36:09 2024============================================================
dev_nf_rx_P dev_nf_rx_B dev_nf_tx_P dev_nf_tx_B kee_d_rx_P kee_d_rx_B kee_d_tx_P kee_d_tx_B
sum 2 305 2 305 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
raw_rx_P raw_rx_B raw_tx_P raw_tx_B dec_rx_P dec_rx_B dec_tx_P dec_tx_B
sum 1 145 1 145 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
dev_l3_rx_P dev_l3_rx_B dev_l3_tx_P dev_l3_tx_B kee_u_rx_P kee_u_rx_B kee_u_rxdop_P kee_u_rxdop_B
sum 1 195 1 195 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
dev_l2_rx_P dev_l2_rx_B dev_l2_tx_P dev_l2_tx_B dev_l3_dop_P dev_l3_dop_B dev_l2_dop_P dev_l2_dop_B
sum 0 0 0 0 1 195 0 0
speed/s 0 0 0 0 0 0 0 0
mirr_bypass_P mirr_bypass_B mirr_block_P mirr_block_B mirr_rxdop_P mirr_rxdop_B mirr_tx_P mirr_tx_B
sum 0 0 0 0 1 145 1 145
speed/s 0 0 0 0 0 0 0 0
stee_bypass_P stee_bypass_B stee_block_P stee_block_B stee_rx_P stee_rx_B stee_tx_P stee_tx_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
miss_sess_P miss_sess_B err_bypass_P err_bypass_B err_block_P err_block_B sf_active sf_inactive
sum 0 0 0 0 1 145 1 0
speed/s 0 0 0 0 0 0 0 0
ctrl_rx_P ctrl_rx_B ctrl_tx_P ctrl_tx_B ctrl_opening ctrl_active ctrl_closing ctrl_resetall
sum 1 160 1 160 0 1 0 0
speed/s 0 0 0 0 0 0 0 0
ctrl_error curr_sessions session_logs session_new session_free stateless_inject_P stateless_inject_B
sum 0 1 0 1 0 0 0
speed/s 0 0 0 0 0 0 0
________________________________________________________________________________________________________________________________________________

View File

@@ -0,0 +1,155 @@
[
{
"tags": {
"name": "SCE"
},
"fields": {
"dev_nf_rx_P": 2,
"dev_nf_rx_B": 305,
"dev_nf_tx_P": 1,
"dev_nf_tx_B": 160,
"kee_d_rx_P": 0,
"kee_d_rx_B": 0,
"kee_d_tx_P": 0,
"kee_d_tx_B": 0,
"raw_rx_P": 1,
"raw_rx_B": 145,
"raw_tx_P": 0,
"raw_tx_B": 0,
"dec_rx_P": 0,
"dec_rx_B": 0,
"dec_tx_P": 0,
"dec_tx_B": 0,
"dev_l3_rx_P": 0,
"dev_l3_rx_B": 0,
"dev_l3_tx_P": 0,
"dev_l3_tx_B": 0,
"dev_l3_dop_P": 0,
"dev_l3_dop_B": 0,
"kee_u_rx_P": 0,
"kee_u_rx_B": 0,
"kee_u_rxdop_P": 0,
"kee_u_rxdop_B": 0,
"dev_l2_rx_P": 0,
"dev_l2_rx_B": 0,
"dev_l2_tx_P": 0,
"dev_l2_tx_B": 0,
"dev_l2_dop_P": 0,
"dev_l2_dop_B": 0,
"mirr_bypass_P": 0,
"mirr_bypass_B": 0,
"mirr_block_P": 0,
"mirr_block_B": 0,
"mirr_rxdop_P": 0,
"mirr_rxdop_B": 0,
"mirr_tx_P": 0,
"mirr_tx_B": 0,
"stee_bypass_P": 0,
"stee_bypass_B": 0,
"stee_block_P": 1,
"stee_block_B": 145,
"stee_rx_P": 0,
"stee_rx_B": 0,
"stee_tx_P": 0,
"stee_tx_B": 0,
"miss_sess_P": 0,
"miss_sess_B": 0,
"err_bypass_P": 0,
"err_bypass_B": 0,
"err_block_P": 0,
"err_block_B": 0,
"sf_active": 0,
"sf_inactive": 0,
"ctrl_rx_P": 1,
"ctrl_rx_B": 160,
"ctrl_tx_P": 1,
"ctrl_tx_B": 160,
"ctrl_opening": 0,
"ctrl_active": 1,
"ctrl_closing": 0,
"ctrl_resetall": 0,
"ctrl_error": 0,
"curr_sessions": 1,
"session_logs": 0,
"session_new": 1,
"session_free": 0,
"stateless_inject_P": 0,
"stateless_inject_B": 0
},
"fields_delta": {
"dev_nf_rx_P": 2,
"dev_nf_rx_B": 305,
"dev_nf_tx_P": 1,
"dev_nf_tx_B": 160,
"kee_d_rx_P": 0,
"kee_d_rx_B": 0,
"kee_d_tx_P": 0,
"kee_d_tx_B": 0,
"raw_rx_P": 1,
"raw_rx_B": 145,
"raw_tx_P": 0,
"raw_tx_B": 0,
"dec_rx_P": 0,
"dec_rx_B": 0,
"dec_tx_P": 0,
"dec_tx_B": 0,
"dev_l3_rx_P": 0,
"dev_l3_rx_B": 0,
"dev_l3_tx_P": 0,
"dev_l3_tx_B": 0,
"dev_l3_dop_P": 0,
"dev_l3_dop_B": 0,
"kee_u_rx_P": 0,
"kee_u_rx_B": 0,
"kee_u_rxdop_P": 0,
"kee_u_rxdop_B": 0,
"dev_l2_rx_P": 0,
"dev_l2_rx_B": 0,
"dev_l2_tx_P": 0,
"dev_l2_tx_B": 0,
"dev_l2_dop_P": 0,
"dev_l2_dop_B": 0,
"mirr_bypass_P": 0,
"mirr_bypass_B": 0,
"mirr_block_P": 0,
"mirr_block_B": 0,
"mirr_rxdop_P": 0,
"mirr_rxdop_B": 0,
"mirr_tx_P": 0,
"mirr_tx_B": 0,
"stee_bypass_P": 0,
"stee_bypass_B": 0,
"stee_block_P": 1,
"stee_block_B": 145,
"stee_rx_P": 0,
"stee_rx_B": 0,
"stee_tx_P": 0,
"stee_tx_B": 0,
"miss_sess_P": 0,
"miss_sess_B": 0,
"err_bypass_P": 0,
"err_bypass_B": 0,
"err_block_P": 0,
"err_block_B": 0,
"sf_active": 0,
"sf_inactive": 0,
"ctrl_rx_P": 1,
"ctrl_rx_B": 160,
"ctrl_tx_P": 1,
"ctrl_tx_B": 160,
"ctrl_opening": 0,
"ctrl_active": 1,
"ctrl_closing": 0,
"ctrl_resetall": 0,
"ctrl_error": 0,
"curr_sessions": 1,
"session_logs": 0,
"session_new": 1,
"session_free": 0,
"stateless_inject_P": 0,
"stateless_inject_B": 0
},
"timestamp_ms": 1731049058690,
"timestamp_ms_delta": 2004
}
]

View File

@@ -1,29 +0,0 @@
============================================================Sat Mar 2 17:32:36 2024============================================================
dev_nf_rx_P dev_nf_rx_B dev_nf_tx_P dev_nf_tx_B kee_d_rx_P kee_d_rx_B kee_d_tx_P kee_d_tx_B
sum 2 305 1 160 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
raw_rx_P raw_rx_B raw_tx_P raw_tx_B dec_rx_P dec_rx_B dec_tx_P dec_tx_B
sum 1 145 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
dev_l3_rx_P dev_l3_rx_B dev_l3_tx_P dev_l3_tx_B kee_u_rx_P kee_u_rx_B kee_u_rxdop_P kee_u_rxdop_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
dev_l2_rx_P dev_l2_rx_B dev_l2_tx_P dev_l2_tx_B dev_l3_dop_P dev_l3_dop_B dev_l2_dop_P dev_l2_dop_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
mirr_bypass_P mirr_bypass_B mirr_block_P mirr_block_B mirr_rxdop_P mirr_rxdop_B mirr_tx_P mirr_tx_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
stee_bypass_P stee_bypass_B stee_block_P stee_block_B stee_rx_P stee_rx_B stee_tx_P stee_tx_B
sum 0 0 1 145 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
miss_sess_P miss_sess_B err_bypass_P err_bypass_B err_block_P err_block_B sf_active sf_inactive
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
ctrl_rx_P ctrl_rx_B ctrl_tx_P ctrl_tx_B ctrl_opening ctrl_active ctrl_closing ctrl_resetall
sum 1 160 1 160 0 1 0 0
speed/s 0 0 0 0 0 0 0 0
ctrl_error curr_sessions session_logs session_new session_free stateless_inject_P stateless_inject_B
sum 0 1 0 1 0 0 0
speed/s 0 0 0 0 0 0 0
________________________________________________________________________________________________________________________________________________

View File

@@ -0,0 +1,155 @@
[
{
"tags": {
"name": "SCE"
},
"fields": {
"dev_nf_rx_P": 2,
"dev_nf_rx_B": 305,
"dev_nf_tx_P": 2,
"dev_nf_tx_B": 305,
"kee_d_rx_P": 0,
"kee_d_rx_B": 0,
"kee_d_tx_P": 0,
"kee_d_tx_B": 0,
"raw_rx_P": 1,
"raw_rx_B": 145,
"raw_tx_P": 1,
"raw_tx_B": 145,
"dec_rx_P": 0,
"dec_rx_B": 0,
"dec_tx_P": 0,
"dec_tx_B": 0,
"dev_l3_rx_P": 0,
"dev_l3_rx_B": 0,
"dev_l3_tx_P": 0,
"dev_l3_tx_B": 0,
"dev_l3_dop_P": 0,
"dev_l3_dop_B": 0,
"kee_u_rx_P": 0,
"kee_u_rx_B": 0,
"kee_u_rxdop_P": 0,
"kee_u_rxdop_B": 0,
"dev_l2_rx_P": 0,
"dev_l2_rx_B": 0,
"dev_l2_tx_P": 0,
"dev_l2_tx_B": 0,
"dev_l2_dop_P": 0,
"dev_l2_dop_B": 0,
"mirr_bypass_P": 0,
"mirr_bypass_B": 0,
"mirr_block_P": 0,
"mirr_block_B": 0,
"mirr_rxdop_P": 0,
"mirr_rxdop_B": 0,
"mirr_tx_P": 0,
"mirr_tx_B": 0,
"stee_bypass_P": 1,
"stee_bypass_B": 145,
"stee_block_P": 0,
"stee_block_B": 0,
"stee_rx_P": 0,
"stee_rx_B": 0,
"stee_tx_P": 0,
"stee_tx_B": 0,
"miss_sess_P": 0,
"miss_sess_B": 0,
"err_bypass_P": 0,
"err_bypass_B": 0,
"err_block_P": 0,
"err_block_B": 0,
"sf_active": 0,
"sf_inactive": 0,
"ctrl_rx_P": 1,
"ctrl_rx_B": 160,
"ctrl_tx_P": 1,
"ctrl_tx_B": 160,
"ctrl_opening": 0,
"ctrl_active": 1,
"ctrl_closing": 0,
"ctrl_resetall": 0,
"ctrl_error": 0,
"curr_sessions": 1,
"session_logs": 0,
"session_new": 1,
"session_free": 0,
"stateless_inject_P": 0,
"stateless_inject_B": 0
},
"fields_delta": {
"dev_nf_rx_P": 2,
"dev_nf_rx_B": 305,
"dev_nf_tx_P": 2,
"dev_nf_tx_B": 305,
"kee_d_rx_P": 0,
"kee_d_rx_B": 0,
"kee_d_tx_P": 0,
"kee_d_tx_B": 0,
"raw_rx_P": 1,
"raw_rx_B": 145,
"raw_tx_P": 1,
"raw_tx_B": 145,
"dec_rx_P": 0,
"dec_rx_B": 0,
"dec_tx_P": 0,
"dec_tx_B": 0,
"dev_l3_rx_P": 0,
"dev_l3_rx_B": 0,
"dev_l3_tx_P": 0,
"dev_l3_tx_B": 0,
"dev_l3_dop_P": 0,
"dev_l3_dop_B": 0,
"kee_u_rx_P": 0,
"kee_u_rx_B": 0,
"kee_u_rxdop_P": 0,
"kee_u_rxdop_B": 0,
"dev_l2_rx_P": 0,
"dev_l2_rx_B": 0,
"dev_l2_tx_P": 0,
"dev_l2_tx_B": 0,
"dev_l2_dop_P": 0,
"dev_l2_dop_B": 0,
"mirr_bypass_P": 0,
"mirr_bypass_B": 0,
"mirr_block_P": 0,
"mirr_block_B": 0,
"mirr_rxdop_P": 0,
"mirr_rxdop_B": 0,
"mirr_tx_P": 0,
"mirr_tx_B": 0,
"stee_bypass_P": 1,
"stee_bypass_B": 145,
"stee_block_P": 0,
"stee_block_B": 0,
"stee_rx_P": 0,
"stee_rx_B": 0,
"stee_tx_P": 0,
"stee_tx_B": 0,
"miss_sess_P": 0,
"miss_sess_B": 0,
"err_bypass_P": 0,
"err_bypass_B": 0,
"err_block_P": 0,
"err_block_B": 0,
"sf_active": 0,
"sf_inactive": 0,
"ctrl_rx_P": 1,
"ctrl_rx_B": 160,
"ctrl_tx_P": 1,
"ctrl_tx_B": 160,
"ctrl_opening": 0,
"ctrl_active": 1,
"ctrl_closing": 0,
"ctrl_resetall": 0,
"ctrl_error": 0,
"curr_sessions": 1,
"session_logs": 0,
"session_new": 1,
"session_free": 0,
"stateless_inject_P": 0,
"stateless_inject_B": 0
},
"timestamp_ms": 1731049043441,
"timestamp_ms_delta": 2003
}
]

View File

@@ -1,29 +0,0 @@
============================================================Sat Mar 2 17:32:04 2024============================================================
dev_nf_rx_P dev_nf_rx_B dev_nf_tx_P dev_nf_tx_B kee_d_rx_P kee_d_rx_B kee_d_tx_P kee_d_tx_B
sum 2 305 2 305 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
raw_rx_P raw_rx_B raw_tx_P raw_tx_B dec_rx_P dec_rx_B dec_tx_P dec_tx_B
sum 1 145 1 145 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
dev_l3_rx_P dev_l3_rx_B dev_l3_tx_P dev_l3_tx_B kee_u_rx_P kee_u_rx_B kee_u_rxdop_P kee_u_rxdop_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
dev_l2_rx_P dev_l2_rx_B dev_l2_tx_P dev_l2_tx_B dev_l3_dop_P dev_l3_dop_B dev_l2_dop_P dev_l2_dop_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
mirr_bypass_P mirr_bypass_B mirr_block_P mirr_block_B mirr_rxdop_P mirr_rxdop_B mirr_tx_P mirr_tx_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
stee_bypass_P stee_bypass_B stee_block_P stee_block_B stee_rx_P stee_rx_B stee_tx_P stee_tx_B
sum 1 145 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
miss_sess_P miss_sess_B err_bypass_P err_bypass_B err_block_P err_block_B sf_active sf_inactive
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
ctrl_rx_P ctrl_rx_B ctrl_tx_P ctrl_tx_B ctrl_opening ctrl_active ctrl_closing ctrl_resetall
sum 1 160 1 160 0 1 0 0
speed/s 0 0 0 0 0 0 0 0
ctrl_error curr_sessions session_logs session_new session_free stateless_inject_P stateless_inject_B
sum 0 1 0 1 0 0 0
speed/s 0 0 0 0 0 0 0
________________________________________________________________________________________________________________________________________________

View File

@@ -0,0 +1,155 @@
[
{
"tags": {
"name": "SCE"
},
"fields": {
"dev_nf_rx_P": 2,
"dev_nf_rx_B": 305,
"dev_nf_tx_P": 1,
"dev_nf_tx_B": 160,
"kee_d_rx_P": 0,
"kee_d_rx_B": 0,
"kee_d_tx_P": 0,
"kee_d_tx_B": 0,
"raw_rx_P": 1,
"raw_rx_B": 145,
"raw_tx_P": 0,
"raw_tx_B": 0,
"dec_rx_P": 0,
"dec_rx_B": 0,
"dec_tx_P": 0,
"dec_tx_B": 0,
"dev_l3_rx_P": 0,
"dev_l3_rx_B": 0,
"dev_l3_tx_P": 1,
"dev_l3_tx_B": 195,
"dev_l3_dop_P": 0,
"dev_l3_dop_B": 0,
"kee_u_rx_P": 0,
"kee_u_rx_B": 0,
"kee_u_rxdop_P": 0,
"kee_u_rxdop_B": 0,
"dev_l2_rx_P": 0,
"dev_l2_rx_B": 0,
"dev_l2_tx_P": 0,
"dev_l2_tx_B": 0,
"dev_l2_dop_P": 0,
"dev_l2_dop_B": 0,
"mirr_bypass_P": 0,
"mirr_bypass_B": 0,
"mirr_block_P": 0,
"mirr_block_B": 0,
"mirr_rxdop_P": 0,
"mirr_rxdop_B": 0,
"mirr_tx_P": 0,
"mirr_tx_B": 0,
"stee_bypass_P": 0,
"stee_bypass_B": 0,
"stee_block_P": 0,
"stee_block_B": 0,
"stee_rx_P": 0,
"stee_rx_B": 0,
"stee_tx_P": 1,
"stee_tx_B": 145,
"miss_sess_P": 0,
"miss_sess_B": 0,
"err_bypass_P": 0,
"err_bypass_B": 0,
"err_block_P": 0,
"err_block_B": 0,
"sf_active": 1,
"sf_inactive": 0,
"ctrl_rx_P": 1,
"ctrl_rx_B": 160,
"ctrl_tx_P": 1,
"ctrl_tx_B": 160,
"ctrl_opening": 0,
"ctrl_active": 1,
"ctrl_closing": 0,
"ctrl_resetall": 0,
"ctrl_error": 0,
"curr_sessions": 1,
"session_logs": 0,
"session_new": 1,
"session_free": 0,
"stateless_inject_P": 0,
"stateless_inject_B": 0
},
"fields_delta": {
"dev_nf_rx_P": 2,
"dev_nf_rx_B": 305,
"dev_nf_tx_P": 1,
"dev_nf_tx_B": 160,
"kee_d_rx_P": 0,
"kee_d_rx_B": 0,
"kee_d_tx_P": 0,
"kee_d_tx_B": 0,
"raw_rx_P": 1,
"raw_rx_B": 145,
"raw_tx_P": 0,
"raw_tx_B": 0,
"dec_rx_P": 0,
"dec_rx_B": 0,
"dec_tx_P": 0,
"dec_tx_B": 0,
"dev_l3_rx_P": 0,
"dev_l3_rx_B": 0,
"dev_l3_tx_P": 1,
"dev_l3_tx_B": 195,
"dev_l3_dop_P": 0,
"dev_l3_dop_B": 0,
"kee_u_rx_P": 0,
"kee_u_rx_B": 0,
"kee_u_rxdop_P": 0,
"kee_u_rxdop_B": 0,
"dev_l2_rx_P": 0,
"dev_l2_rx_B": 0,
"dev_l2_tx_P": 0,
"dev_l2_tx_B": 0,
"dev_l2_dop_P": 0,
"dev_l2_dop_B": 0,
"mirr_bypass_P": 0,
"mirr_bypass_B": 0,
"mirr_block_P": 0,
"mirr_block_B": 0,
"mirr_rxdop_P": 0,
"mirr_rxdop_B": 0,
"mirr_tx_P": 0,
"mirr_tx_B": 0,
"stee_bypass_P": 0,
"stee_bypass_B": 0,
"stee_block_P": 0,
"stee_block_B": 0,
"stee_rx_P": 0,
"stee_rx_B": 0,
"stee_tx_P": 1,
"stee_tx_B": 145,
"miss_sess_P": 0,
"miss_sess_B": 0,
"err_bypass_P": 0,
"err_bypass_B": 0,
"err_block_P": 0,
"err_block_B": 0,
"sf_active": 1,
"sf_inactive": 0,
"ctrl_rx_P": 1,
"ctrl_rx_B": 160,
"ctrl_tx_P": 1,
"ctrl_tx_B": 160,
"ctrl_opening": 0,
"ctrl_active": 1,
"ctrl_closing": 0,
"ctrl_resetall": 0,
"ctrl_error": 0,
"curr_sessions": 1,
"session_logs": 0,
"session_new": 1,
"session_free": 0,
"stateless_inject_P": 0,
"stateless_inject_B": 0
},
"timestamp_ms": 1731049074959,
"timestamp_ms_delta": 2004
}
]

View File

@@ -1,29 +0,0 @@
============================================================Sat Mar 2 17:33:12 2024============================================================
dev_nf_rx_P dev_nf_rx_B dev_nf_tx_P dev_nf_tx_B kee_d_rx_P kee_d_rx_B kee_d_tx_P kee_d_tx_B
sum 2 305 1 160 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
raw_rx_P raw_rx_B raw_tx_P raw_tx_B dec_rx_P dec_rx_B dec_tx_P dec_tx_B
sum 1 145 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
dev_l3_rx_P dev_l3_rx_B dev_l3_tx_P dev_l3_tx_B kee_u_rx_P kee_u_rx_B kee_u_rxdop_P kee_u_rxdop_B
sum 0 0 1 195 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
dev_l2_rx_P dev_l2_rx_B dev_l2_tx_P dev_l2_tx_B dev_l3_dop_P dev_l3_dop_B dev_l2_dop_P dev_l2_dop_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
mirr_bypass_P mirr_bypass_B mirr_block_P mirr_block_B mirr_rxdop_P mirr_rxdop_B mirr_tx_P mirr_tx_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
stee_bypass_P stee_bypass_B stee_block_P stee_block_B stee_rx_P stee_rx_B stee_tx_P stee_tx_B
sum 0 0 0 0 0 0 1 145
speed/s 0 0 0 0 0 0 0 0
miss_sess_P miss_sess_B err_bypass_P err_bypass_B err_block_P err_block_B sf_active sf_inactive
sum 0 0 0 0 0 0 1 0
speed/s 0 0 0 0 0 0 0 0
ctrl_rx_P ctrl_rx_B ctrl_tx_P ctrl_tx_B ctrl_opening ctrl_active ctrl_closing ctrl_resetall
sum 1 160 1 160 0 1 0 0
speed/s 0 0 0 0 0 0 0 0
ctrl_error curr_sessions session_logs session_new session_free stateless_inject_P stateless_inject_B
sum 0 1 0 1 0 0 0
speed/s 0 0 0 0 0 0 0
________________________________________________________________________________________________________________________________________________

View File

@@ -0,0 +1,155 @@
[
{
"tags": {
"name": "SCE"
},
"fields": {
"dev_nf_rx_P": 2,
"dev_nf_rx_B": 305,
"dev_nf_tx_P": 2,
"dev_nf_tx_B": 305,
"kee_d_rx_P": 0,
"kee_d_rx_B": 0,
"kee_d_tx_P": 0,
"kee_d_tx_B": 0,
"raw_rx_P": 1,
"raw_rx_B": 145,
"raw_tx_P": 1,
"raw_tx_B": 145,
"dec_rx_P": 0,
"dec_rx_B": 0,
"dec_tx_P": 0,
"dec_tx_B": 0,
"dev_l3_rx_P": 1,
"dev_l3_rx_B": 195,
"dev_l3_tx_P": 1,
"dev_l3_tx_B": 195,
"dev_l3_dop_P": 0,
"dev_l3_dop_B": 0,
"kee_u_rx_P": 0,
"kee_u_rx_B": 0,
"kee_u_rxdop_P": 0,
"kee_u_rxdop_B": 0,
"dev_l2_rx_P": 0,
"dev_l2_rx_B": 0,
"dev_l2_tx_P": 0,
"dev_l2_tx_B": 0,
"dev_l2_dop_P": 0,
"dev_l2_dop_B": 0,
"mirr_bypass_P": 0,
"mirr_bypass_B": 0,
"mirr_block_P": 0,
"mirr_block_B": 0,
"mirr_rxdop_P": 0,
"mirr_rxdop_B": 0,
"mirr_tx_P": 0,
"mirr_tx_B": 0,
"stee_bypass_P": 0,
"stee_bypass_B": 0,
"stee_block_P": 0,
"stee_block_B": 0,
"stee_rx_P": 1,
"stee_rx_B": 145,
"stee_tx_P": 1,
"stee_tx_B": 145,
"miss_sess_P": 0,
"miss_sess_B": 0,
"err_bypass_P": 0,
"err_bypass_B": 0,
"err_block_P": 0,
"err_block_B": 0,
"sf_active": 1,
"sf_inactive": 0,
"ctrl_rx_P": 1,
"ctrl_rx_B": 160,
"ctrl_tx_P": 1,
"ctrl_tx_B": 160,
"ctrl_opening": 0,
"ctrl_active": 1,
"ctrl_closing": 0,
"ctrl_resetall": 0,
"ctrl_error": 0,
"curr_sessions": 1,
"session_logs": 0,
"session_new": 1,
"session_free": 0,
"stateless_inject_P": 0,
"stateless_inject_B": 0
},
"fields_delta": {
"dev_nf_rx_P": 2,
"dev_nf_rx_B": 305,
"dev_nf_tx_P": 2,
"dev_nf_tx_B": 305,
"kee_d_rx_P": 0,
"kee_d_rx_B": 0,
"kee_d_tx_P": 0,
"kee_d_tx_B": 0,
"raw_rx_P": 1,
"raw_rx_B": 145,
"raw_tx_P": 1,
"raw_tx_B": 145,
"dec_rx_P": 0,
"dec_rx_B": 0,
"dec_tx_P": 0,
"dec_tx_B": 0,
"dev_l3_rx_P": 1,
"dev_l3_rx_B": 195,
"dev_l3_tx_P": 1,
"dev_l3_tx_B": 195,
"dev_l3_dop_P": 0,
"dev_l3_dop_B": 0,
"kee_u_rx_P": 0,
"kee_u_rx_B": 0,
"kee_u_rxdop_P": 0,
"kee_u_rxdop_B": 0,
"dev_l2_rx_P": 0,
"dev_l2_rx_B": 0,
"dev_l2_tx_P": 0,
"dev_l2_tx_B": 0,
"dev_l2_dop_P": 0,
"dev_l2_dop_B": 0,
"mirr_bypass_P": 0,
"mirr_bypass_B": 0,
"mirr_block_P": 0,
"mirr_block_B": 0,
"mirr_rxdop_P": 0,
"mirr_rxdop_B": 0,
"mirr_tx_P": 0,
"mirr_tx_B": 0,
"stee_bypass_P": 0,
"stee_bypass_B": 0,
"stee_block_P": 0,
"stee_block_B": 0,
"stee_rx_P": 1,
"stee_rx_B": 145,
"stee_tx_P": 1,
"stee_tx_B": 145,
"miss_sess_P": 0,
"miss_sess_B": 0,
"err_bypass_P": 0,
"err_bypass_B": 0,
"err_block_P": 0,
"err_block_B": 0,
"sf_active": 1,
"sf_inactive": 0,
"ctrl_rx_P": 1,
"ctrl_rx_B": 160,
"ctrl_tx_P": 1,
"ctrl_tx_B": 160,
"ctrl_opening": 0,
"ctrl_active": 1,
"ctrl_closing": 0,
"ctrl_resetall": 0,
"ctrl_error": 0,
"curr_sessions": 1,
"session_logs": 0,
"session_new": 1,
"session_free": 0,
"stateless_inject_P": 0,
"stateless_inject_B": 0
},
"timestamp_ms": 1731049090256,
"timestamp_ms_delta": 2004
}
]

View File

@@ -1,29 +0,0 @@
============================================================Sat Mar 2 17:33:53 2024============================================================
dev_nf_rx_P dev_nf_rx_B dev_nf_tx_P dev_nf_tx_B kee_d_rx_P kee_d_rx_B kee_d_tx_P kee_d_tx_B
sum 2 305 2 305 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
raw_rx_P raw_rx_B raw_tx_P raw_tx_B dec_rx_P dec_rx_B dec_tx_P dec_tx_B
sum 1 145 1 145 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
dev_l3_rx_P dev_l3_rx_B dev_l3_tx_P dev_l3_tx_B kee_u_rx_P kee_u_rx_B kee_u_rxdop_P kee_u_rxdop_B
sum 1 195 1 195 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
dev_l2_rx_P dev_l2_rx_B dev_l2_tx_P dev_l2_tx_B dev_l3_dop_P dev_l3_dop_B dev_l2_dop_P dev_l2_dop_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
mirr_bypass_P mirr_bypass_B mirr_block_P mirr_block_B mirr_rxdop_P mirr_rxdop_B mirr_tx_P mirr_tx_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
stee_bypass_P stee_bypass_B stee_block_P stee_block_B stee_rx_P stee_rx_B stee_tx_P stee_tx_B
sum 0 0 0 0 1 145 1 145
speed/s 0 0 0 0 0 0 0 0
miss_sess_P miss_sess_B err_bypass_P err_bypass_B err_block_P err_block_B sf_active sf_inactive
sum 0 0 0 0 0 0 1 0
speed/s 0 0 0 0 0 0 0 0
ctrl_rx_P ctrl_rx_B ctrl_tx_P ctrl_tx_B ctrl_opening ctrl_active ctrl_closing ctrl_resetall
sum 1 160 1 160 0 1 0 0
speed/s 0 0 0 0 0 0 0 0
ctrl_error curr_sessions session_logs session_new session_free stateless_inject_P stateless_inject_B
sum 0 1 0 1 0 0 0
speed/s 0 0 0 0 0 0 0
________________________________________________________________________________________________________________________________________________

View File

@@ -0,0 +1,155 @@
[
{
"tags": {
"name": "SCE"
},
"fields": {
"dev_nf_rx_P": 4,
"dev_nf_rx_B": 610,
"dev_nf_tx_P": 2,
"dev_nf_tx_B": 320,
"kee_d_rx_P": 0,
"kee_d_rx_B": 0,
"kee_d_tx_P": 0,
"kee_d_tx_B": 0,
"raw_rx_P": 1,
"raw_rx_B": 145,
"raw_tx_P": 0,
"raw_tx_B": 0,
"dec_rx_P": 1,
"dec_rx_B": 145,
"dec_tx_P": 0,
"dec_tx_B": 0,
"dev_l3_rx_P": 0,
"dev_l3_rx_B": 0,
"dev_l3_tx_P": 2,
"dev_l3_tx_B": 390,
"dev_l3_dop_P": 0,
"dev_l3_dop_B": 0,
"kee_u_rx_P": 0,
"kee_u_rx_B": 0,
"kee_u_rxdop_P": 0,
"kee_u_rxdop_B": 0,
"dev_l2_rx_P": 0,
"dev_l2_rx_B": 0,
"dev_l2_tx_P": 0,
"dev_l2_tx_B": 0,
"dev_l2_dop_P": 0,
"dev_l2_dop_B": 0,
"mirr_bypass_P": 0,
"mirr_bypass_B": 0,
"mirr_block_P": 0,
"mirr_block_B": 0,
"mirr_rxdop_P": 0,
"mirr_rxdop_B": 0,
"mirr_tx_P": 0,
"mirr_tx_B": 0,
"stee_bypass_P": 0,
"stee_bypass_B": 0,
"stee_block_P": 0,
"stee_block_B": 0,
"stee_rx_P": 0,
"stee_rx_B": 0,
"stee_tx_P": 2,
"stee_tx_B": 290,
"miss_sess_P": 0,
"miss_sess_B": 0,
"err_bypass_P": 0,
"err_bypass_B": 0,
"err_block_P": 0,
"err_block_B": 0,
"sf_active": 2,
"sf_inactive": 0,
"ctrl_rx_P": 2,
"ctrl_rx_B": 320,
"ctrl_tx_P": 2,
"ctrl_tx_B": 320,
"ctrl_opening": 0,
"ctrl_active": 2,
"ctrl_closing": 0,
"ctrl_resetall": 0,
"ctrl_error": 0,
"curr_sessions": 1,
"session_logs": 0,
"session_new": 1,
"session_free": 0,
"stateless_inject_P": 0,
"stateless_inject_B": 0
},
"fields_delta": {
"dev_nf_rx_P": 4,
"dev_nf_rx_B": 610,
"dev_nf_tx_P": 2,
"dev_nf_tx_B": 320,
"kee_d_rx_P": 0,
"kee_d_rx_B": 0,
"kee_d_tx_P": 0,
"kee_d_tx_B": 0,
"raw_rx_P": 1,
"raw_rx_B": 145,
"raw_tx_P": 0,
"raw_tx_B": 0,
"dec_rx_P": 1,
"dec_rx_B": 145,
"dec_tx_P": 0,
"dec_tx_B": 0,
"dev_l3_rx_P": 0,
"dev_l3_rx_B": 0,
"dev_l3_tx_P": 2,
"dev_l3_tx_B": 390,
"dev_l3_dop_P": 0,
"dev_l3_dop_B": 0,
"kee_u_rx_P": 0,
"kee_u_rx_B": 0,
"kee_u_rxdop_P": 0,
"kee_u_rxdop_B": 0,
"dev_l2_rx_P": 0,
"dev_l2_rx_B": 0,
"dev_l2_tx_P": 0,
"dev_l2_tx_B": 0,
"dev_l2_dop_P": 0,
"dev_l2_dop_B": 0,
"mirr_bypass_P": 0,
"mirr_bypass_B": 0,
"mirr_block_P": 0,
"mirr_block_B": 0,
"mirr_rxdop_P": 0,
"mirr_rxdop_B": 0,
"mirr_tx_P": 0,
"mirr_tx_B": 0,
"stee_bypass_P": 0,
"stee_bypass_B": 0,
"stee_block_P": 0,
"stee_block_B": 0,
"stee_rx_P": 0,
"stee_rx_B": 0,
"stee_tx_P": 2,
"stee_tx_B": 290,
"miss_sess_P": 0,
"miss_sess_B": 0,
"err_bypass_P": 0,
"err_bypass_B": 0,
"err_block_P": 0,
"err_block_B": 0,
"sf_active": 2,
"sf_inactive": 0,
"ctrl_rx_P": 2,
"ctrl_rx_B": 320,
"ctrl_tx_P": 2,
"ctrl_tx_B": 320,
"ctrl_opening": 0,
"ctrl_active": 2,
"ctrl_closing": 0,
"ctrl_resetall": 0,
"ctrl_error": 0,
"curr_sessions": 1,
"session_logs": 0,
"session_new": 1,
"session_free": 0,
"stateless_inject_P": 0,
"stateless_inject_B": 0
},
"timestamp_ms": 1731049169216,
"timestamp_ms_delta": 2004
}
]

View File

@@ -1,29 +0,0 @@
============================================================Sat Mar 2 17:38:11 2024============================================================
dev_nf_rx_P dev_nf_rx_B dev_nf_tx_P dev_nf_tx_B kee_d_rx_P kee_d_rx_B kee_d_tx_P kee_d_tx_B
sum 4 610 2 320 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
raw_rx_P raw_rx_B raw_tx_P raw_tx_B dec_rx_P dec_rx_B dec_tx_P dec_tx_B
sum 1 145 0 0 1 145 0 0
speed/s 0 0 0 0 0 0 0 0
dev_l3_rx_P dev_l3_rx_B dev_l3_tx_P dev_l3_tx_B kee_u_rx_P kee_u_rx_B kee_u_rxdop_P kee_u_rxdop_B
sum 0 0 2 390 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
dev_l2_rx_P dev_l2_rx_B dev_l2_tx_P dev_l2_tx_B dev_l3_dop_P dev_l3_dop_B dev_l2_dop_P dev_l2_dop_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
mirr_bypass_P mirr_bypass_B mirr_block_P mirr_block_B mirr_rxdop_P mirr_rxdop_B mirr_tx_P mirr_tx_B
sum 0 0 0 0 0 0 0 0
speed/s 0 0 0 0 0 0 0 0
stee_bypass_P stee_bypass_B stee_block_P stee_block_B stee_rx_P stee_rx_B stee_tx_P stee_tx_B
sum 0 0 0 0 0 0 2 290
speed/s 0 0 0 0 0 0 0 0
miss_sess_P miss_sess_B err_bypass_P err_bypass_B err_block_P err_block_B sf_active sf_inactive
sum 0 0 0 0 0 0 2 0
speed/s 0 0 0 0 0 0 0 0
ctrl_rx_P ctrl_rx_B ctrl_tx_P ctrl_tx_B ctrl_opening ctrl_active ctrl_closing ctrl_resetall
sum 2 320 2 320 0 2 0 0
speed/s 0 0 0 0 0 0 0 0
ctrl_error curr_sessions session_logs session_new session_free stateless_inject_P stateless_inject_B
sum 0 1 0 1 0 0 0
speed/s 0 0 0 0 0 0 0
________________________________________________________________________________________________________________________________________________